From a30641295a1907aeef73f3a38677ef8ec94b6f85 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 26 May 2021 15:32:53 +0200 Subject: [PATCH] drivers/intel/fsp1_1: Drop weak function definition The only FSP 1.1 platform is Braswell, which has a non-weak definition for the `soc_silicon_init_params` function. This changes the resulting BUILD_TIMELESS=1 coreboot image for Facebook fbg1701, for some reason. Change-Id: I2a1b51cda9eb21d7af8372c16a43195a4bdd9543 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/54956 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/drivers/intel/fsp1_1/ramstage.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c index 597e886465..3ae473bd04 100644 --- a/src/drivers/intel/fsp1_1/ramstage.c +++ b/src/drivers/intel/fsp1_1/ramstage.c @@ -172,8 +172,3 @@ __weak void mainboard_silicon_init_params( SILICON_INIT_UPD *params) { } - -/* Initialize the UPD parameters for SiliconInit */ -__weak void soc_silicon_init_params(SILICON_INIT_UPD *params) -{ -}