mb/google/volteer/variants/delbin: Update PL1 min and max for Delbin
Update PL1 min and max values for Delbin systems BUG=b:168958222 BRANCH=None TEST=Build and verify on delbin system Signed-off-by: Deepika Punyamurtula <deepika.punyamurtula@intel.com> Change-Id: I2152f0dbeb0ae463b78464571b6c434830f0082a Reviewed-on: https://review.coreboot.org/c/coreboot/+/49364 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Zhuohao Lee <zhuohao@google.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
This commit is contained in:
parent
92675d6723
commit
a36b8472eb
|
@ -69,7 +69,7 @@ chip soc/intel/tigerlake
|
||||||
register "tcc_offset" = "8"
|
register "tcc_offset" = "8"
|
||||||
|
|
||||||
register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{
|
register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{
|
||||||
.tdp_pl1_override = 15,
|
.tdp_pl1_override = 18,
|
||||||
.tdp_pl2_override = 51,
|
.tdp_pl2_override = 51,
|
||||||
.tdp_pl4 = 105,
|
.tdp_pl4 = 105,
|
||||||
}"
|
}"
|
||||||
|
@ -104,11 +104,11 @@ chip soc/intel/tigerlake
|
||||||
[4] = DPTF_CRITICAL(TEMP_SENSOR_3, 80, SHUTDOWN)}"
|
[4] = DPTF_CRITICAL(TEMP_SENSOR_3, 80, SHUTDOWN)}"
|
||||||
|
|
||||||
## Power Limits Control
|
## Power Limits Control
|
||||||
# 3-15W PL1 in 200mW increments, avg over 28-32s interval
|
# 12-18W PL1 in 200mW increments, avg over 28-32s interval
|
||||||
# PL2 is 15-51W, avg over 28-32s interval
|
# PL2 is 51W, avg over 28-32s interval
|
||||||
register "controls.power_limits" = "{
|
register "controls.power_limits" = "{
|
||||||
.pl1 = {.min_power = 3000,
|
.pl1 = {.min_power = 12000,
|
||||||
.max_power = 15000,
|
.max_power = 18000,
|
||||||
.time_window_min = 28 * MSECS_PER_SEC,
|
.time_window_min = 28 * MSECS_PER_SEC,
|
||||||
.time_window_max = 32 * MSECS_PER_SEC,
|
.time_window_max = 32 * MSECS_PER_SEC,
|
||||||
.granularity = 200,},
|
.granularity = 200,},
|
||||||
|
|
Loading…
Reference in New Issue