soc/intel/common/block/cpu: Refactor init_cpus function
This patch makes init_cpus function external so that it can be used in below scenarios: 1. When coreboot is doing MP initialization as part of BS_DEV_INIT_CHIPS (exclude this call if user has selected USE_INTEL_FSP_MP_INIT) 2. coreboot would like to take APs control back after FSP-S has done with MP initialization based on user select USE_INTEL_FSP_MP_INIT Also make sure post_cpus_init function is getting executed unconditionally to update MTRR snapshot on all cores. Change-Id: Idc03090360f34df074b33ba0fced2d192edf068a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44076 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -127,19 +127,32 @@ void get_microcode_info(const void **microcode, int *parallel)
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*parallel = 1;
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}
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static void init_cpus(void *unused)
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/*
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* Perform BSP and AP initialization
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* This function can be called in below cases:
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* 1. During coreboot is doing MP initialization as part of BS_DEV_INIT_CHIPS (exclude
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* this call if user has selected USE_INTEL_FSP_MP_INIT).
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* 2. coreboot would like to take APs control back after FSP-S has done with MP
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* initialization based on user select USE_INTEL_FSP_MP_INIT.
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*/
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void init_cpus(void)
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{
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struct device *dev = dev_find_path(NULL, DEVICE_PATH_CPU_CLUSTER);
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assert(dev != NULL);
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if (dev && dev->link_list)
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soc_init_cpus(dev->link_list);
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}
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static void coreboot_init_cpus(void *unused)
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{
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if (CONFIG(USE_INTEL_FSP_MP_INIT))
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return;
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microcode_patch = intel_microcode_find();
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intel_microcode_load_unlocked(microcode_patch);
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if (dev && dev->link_list)
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soc_init_cpus(dev->link_list);
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init_cpus();
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}
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static void wrapper_x86_setup_mtrrs(void *unused)
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@ -150,9 +163,6 @@ static void wrapper_x86_setup_mtrrs(void *unused)
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/* Ensure to re-program all MTRRs based on DRAM resource settings */
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static void post_cpus_init(void *unused)
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{
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if (CONFIG(USE_INTEL_FSP_MP_INIT))
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return;
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if (mp_run_on_all_cpus(&wrapper_x86_setup_mtrrs, NULL) < 0)
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printk(BIOS_ERR, "MTRR programming failure\n");
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@ -160,6 +170,6 @@ static void post_cpus_init(void *unused)
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}
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/* Do CPU MP Init before FSP Silicon Init */
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_ENTRY, init_cpus, NULL);
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BOOT_STATE_INIT_ENTRY(BS_DEV_INIT_CHIPS, BS_ON_ENTRY, coreboot_init_cpus, NULL);
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BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_EXIT, post_cpus_init, NULL);
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BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, post_cpus_init, NULL);
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@ -69,6 +69,16 @@ const void *intel_mp_current_microcode(void);
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*/
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void get_microcode_info(const void **microcode, int *parallel);
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/*
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* Perform BSP and AP initialization
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* This function can be called in below cases
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* 1. During coreboot is doing MP initialization as part of BS_DEV_INIT_CHIPS (exclude
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* this call if user has selected USE_INTEL_FSP_MP_INIT)
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* 2. coreboot would like to take APs control back after FSP-S has done with MP
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* initialization based on user select USE_INTEL_FSP_MP_INIT
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*/
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void init_cpus(void);
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/*
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* SoC Overrides
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*
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