*** empty log message ***

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/ppc/ppc7xx/Config.lb

@@ -17,3 +17,7 @@ default DCACHE_RAM_SIZE=16384
 
 initinclude "FAMILY_INIT" cpu/ppc/ppc7xx/ppc7xx.inc
 
+object clock.o
+object cache.S
+initobject clock.o
+initobject cache.S

src/cpu/ppc/ppc7xx/cache.S

@@ -0,0 +1,23 @@
+#define ASM
+#include "ppcreg.h"
+#include <ppc_asm.tmpl>
+
+#define NUM_CACHE_LINES 128*8
+#define L1_CACHE_LINE_SIZE 32
+#define cache_flush_buffer 0x1000
+
+/*
+ * Flush data cache
+ * Do this by just reading lots of stuff into the cache.
+ */
+.globl flush_dcache
+flush_dcache:
+	lis     r3,cache_flush_buffer@h
+	ori     r3,r3,cache_flush_buffer@l
+	li      r4,NUM_CACHE_LINES
+	mtctr   r4
+0:	lwz     r4,0(r3)
+	addi    r3,r3,L1_CACHE_LINE_SIZE
+	bdnz    0b
+	blr
+

src/cpu/ppc/ppc7xx/clock.c

@@ -0,0 +1,27 @@
+#include <ppc.h>
+
+static int PLL_multiplier[] = {
+	25,	/* 0000 - 2.5x   */
+	75,	/* 0001 - 7.5x   */
+	70,	/* 0010 - 7x     */
+	10,	/* 0011 - bypass */
+	20,	/* 0100 - 2x     */
+	65,	/* 0101 - 6.5x   */
+	100,	/* 0110 - 10x    */
+	45,	/* 0111 - 4.5x   */
+	30,	/* 1000 - 3x     */
+	55,	/* 1001 - 5.5x   */
+	40,	/* 1010 - 4x     */
+	50,	/* 1011 - 5x     */
+	80,	/* 1100 - 8x     */
+	60,	/* 1101 - 6x     */
+	35,	/* 1110 - 3.5x   */
+	0,	/* 1111 - off    */
+};
+
+unsigned long 
+get_clock_speed(void)
+{
+	unsigned long clock = CONFIG_SYS_CLK_FREQ * 1000000;
+	return clock * PLL_multiplier[ppc_gethid1() >> 28] / 10;
+}

src/cpu/ppc/ppc7xx/ppc7xx.inc

@@ -56,37 +56,10 @@
 	/*
 	 * Clear segment registers (LinuxBIOS doesn't use these)
 	 */
-	mtsr    0, r0
-	isync
-	mtsr    1, r0
-	isync
-	mtsr    2, r0
-	isync
-	mtsr    3, r0
-	isync
-	mtsr    4, r0
-	isync
-	mtsr    5, r0
-	isync
-	mtsr    6, r0
-	isync
-	mtsr    7, r0
-	isync
-	mtsr    8, r0
-	isync
-	mtsr    9, r0
-	isync
-	mtsr    10, r0
-	isync
-	mtsr    11, r0
-	isync
-	mtsr    12, r0
-	isync
-	mtsr    13, r0
-	isync
-	mtsr    14, r0
-	isync
-	mtsr    15, r0
+	li	r3, 15
+1:	mtsrin  r3, r0
+	subic.	r3, r3, 1
+	bge	1b
 	isync
 
         /*