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soc/intel/alderlake: Fill FSPM UPDs for VT-d configuration 

Update UPDs required for configuring VT-d.

TEST=Boot to kernel, load ChromeOS VM.

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I96a9f3df185002a4e58faa910f867ace0b97ec2b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51849
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Meera Ravindranath 2021-03-26 15:10:48 +05:30 committed by Patrick Georgi
parent 13e240c602
commit a3f7debc89
1 changed files with 30 additions and 3 deletions
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31
src/soc/intel/alderlake/romstage/fsp_params.c
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@ -28,6 +28,12 @@ enum pcie_rp_type {
CPU_PCIE_RP, CPU_PCIE_RP,
}; };
enum vtd_base_index_type {
VTD_GFX,
VTD_IPU,
VTD_VTVCO,
};
static uint8_t clk_src_to_fsp(enum pcie_rp_type type, int rp_number) static uint8_t clk_src_to_fsp(enum pcie_rp_type type, int rp_number)
{ {
assert(type == PCH_PCIE_RP || type == CPU_PCIE_RP); assert(type == PCH_PCIE_RP || type == CPU_PCIE_RP);
@ -197,9 +203,30 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
dev = pcidev_path_on_root(SA_DEVFN_TBT3); dev = pcidev_path_on_root(SA_DEVFN_TBT3);
m_cfg->TcssItbtPcie3En = is_dev_enabled(dev); m_cfg->TcssItbtPcie3En = is_dev_enabled(dev);
/* Vt-D config */ /* VT-d config */
/* Disable VT-d support for pre-QS platform */ m_cfg->VtdBaseAddress[VTD_GFX] = GFXVT_BASE_ADDRESS;
m_cfg->VtdBaseAddress[VTD_IPU] = IPUVT_BASE_ADDRESS;
m_cfg->VtdBaseAddress[VTD_VTVCO] = VTVC0_BASE_ADDRESS;
m_cfg->VtdDisable = 0;
m_cfg->VtdIopEnable = !m_cfg->VtdDisable;
m_cfg->VtdIgdEnable = m_cfg->InternalGfx;
m_cfg->VtdIpuEnable = m_cfg->SaIpuEnable;
if (m_cfg->VtdIgdEnable && m_cfg->VtdBaseAddress[VTD_GFX] == 0) {
m_cfg->VtdIgdEnable = 0;
printk(BIOS_ERR, "ERROR: Requested IGD VT-d, but GFXVT_BASE_ADDRESS is 0\n");
}
if (m_cfg->VtdIpuEnable && m_cfg->VtdBaseAddress[VTD_IPU] == 0) {
m_cfg->VtdIpuEnable = 0;
printk(BIOS_ERR, "ERROR: Requested IPU VT-d, but IPUVT_BASE_ADDRESS is 0\n");
}
if (!m_cfg->VtdDisable && m_cfg->VtdBaseAddress[VTD_VTVCO] == 0) {
m_cfg->VtdDisable = 1; m_cfg->VtdDisable = 1;
printk(BIOS_ERR, "ERROR: Requested VT-d, but VTVCO_BASE_ADDRESS is 0\n");
}
/* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */ /* Change VmxEnable UPD value according to ENABLE_VMX Kconfig */
m_cfg->VmxEnable = CONFIG(ENABLE_VMX); m_cfg->VmxEnable = CONFIG(ENABLE_VMX);