diff --git a/src/include/bootmode.h b/src/include/bootmode.h
index 96c789bd70..730c0f37d3 100644
--- a/src/include/bootmode.h
+++ b/src/include/bootmode.h
@@ -23,6 +23,7 @@
 /* functions implemented per mainboard: */
 void init_bootmode_straps(void);
 int get_write_protect_state(void);
+int get_sw_write_protect_state(void);
 int get_developer_mode_switch(void);
 int get_recovery_mode_switch(void);
 int clear_recovery_mode_switch(void);
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index 1b93eb67f4..7bd2663b25 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -362,11 +362,9 @@ void ramstage_cache_invalid(void)
 #endif
 }
 
-#if CONFIG_CHROMEOS
-int vboot_get_sw_write_protect(void)
+int get_sw_write_protect_state(void)
 {
 	u8 status;
 	/* Return unprotected status if status read fails. */
 	return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80));
 }
-#endif
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 27fb0f28c5..884c274316 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -147,13 +147,11 @@ void ramstage_cache_invalid(void)
 #endif
 }
 
-#if CONFIG_CHROMEOS
-int vboot_get_sw_write_protect(void)
+int get_sw_write_protect_state(void)
 {
 	u8 status;
 	/* Return unprotected status if status read fails. */
 	return (early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80));
 }
 
-#endif
 void __attribute__((weak)) mainboard_pre_console_init(void) {}
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 6c5d64a6c6..6804459c19 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -68,15 +68,13 @@ void soc_romstage_init(struct romstage_params *params)
 	pch_early_init();
 }
 
-#if IS_ENABLED(CONFIG_CHROMEOS)
-int vboot_get_sw_write_protect(void)
+int get_sw_write_protect_state(void)
 {
 	u8 status;
 
 	/* Return unprotected status if status read fails. */
 	return early_spi_read_wpsr(&status) ? 0 : !!(status & 0x80);
 }
-#endif
 
 /* UPD parameters to be initialized before MemoryInit */
 void soc_memory_init_params(struct romstage_params *params,
diff --git a/src/vendorcode/google/chromeos/chromeos.c b/src/vendorcode/google/chromeos/chromeos.c
index 0737267742..c2190b737d 100644
--- a/src/vendorcode/google/chromeos/chromeos.c
+++ b/src/vendorcode/google/chromeos/chromeos.c
@@ -65,7 +65,7 @@ void __attribute__((weak)) save_chromeos_gpios(void)
 	// Can be implemented by a mainboard
 }
 
-int __attribute__((weak)) vboot_get_sw_write_protect(void)
+int __attribute__((weak)) get_sw_write_protect_state(void)
 {
 	// Can be implemented by a platform / mainboard
 	return 0;
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index c7048ddcd8..798ab3eb3a 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -68,8 +68,6 @@ static inline int vboot_get_handoff_info(void **addr, uint32_t *size)
 }
 #endif /* CONFIG_VBOOT_VERIFY_FIRMWARE */
 
-int vboot_get_sw_write_protect(void);
-
 #include "gnvs.h"
 struct device;
 
diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
index c8ba114b0c..8e12fdcad0 100644
--- a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
+++ b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c
@@ -61,7 +61,7 @@ static void fill_vboot_handoff(struct vboot_handoff *vboot_handoff,
 
 	if (get_write_protect_state())
 		vb_sd->flags |= VBSD_BOOT_FIRMWARE_WP_ENABLED;
-	if (vboot_get_sw_write_protect())
+	if (get_sw_write_protect_state())
 		vb_sd->flags |= VBSD_BOOT_FIRMWARE_SW_WP_ENABLED;
 
 	if (vb2_sd->recovery_reason) {