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sb/intel/*/acpi/lpc.asl: Drop unnecessary RCBA offset 

Nothing should be using this offset.

Change-Id: Ia4736471e2ac53bec18bfe073f4aa49e3fc524a8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46765
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-25 13:54:38 +01:00
parent 9f8e92bae3
commit a42d37ac3f
5 changed files with 0 additions and 25 deletions
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5
src/southbridge/intel/bd82x6x/acpi/lpc.asl
View File

@ -43,11 +43,6 @@ Device (LPCB)
GR13, 2,
GR14, 2,
GR15, 2,
Offset (0xf0), // RCBA
RCEN, 1,
, 13,
RCBA, 18,
}
#include <southbridge/intel/common/acpi/irqlinks.asl>

5
src/southbridge/intel/i82801gx/acpi/lpc.asl
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@ -25,11 +25,6 @@ Device (LPCB)
Offset (0x80), // IO Decode Ranges
IOD0, 8,
IOD1, 8,
Offset (0xf0), // RCBA
RCEN, 1,
, 13,
RCBA, 18,
}
#include <southbridge/intel/common/acpi/irqlinks.asl>

5
src/southbridge/intel/i82801ix/acpi/lpc.asl
View File

@ -25,11 +25,6 @@ Device (LPCB)
Offset (0x80), // IO Decode Ranges
IOD0, 8,
IOD1, 8,
Offset (0xf0), // RCBA
RCEN, 1,
, 13,
RCBA, 18,
}
#include <southbridge/intel/common/acpi/irqlinks.asl>

5
src/southbridge/intel/i82801jx/acpi/lpc.asl
View File

@ -25,11 +25,6 @@ Device (LPCB)
Offset (0x80), // IO Decode Ranges
IOD0, 8,
IOD1, 8,
Offset (0xf0), // RCBA
RCEN, 1,
, 13,
RCBA, 18,
}
#include <southbridge/intel/common/acpi/irqlinks.asl>

5
src/southbridge/intel/lynxpoint/acpi/lpc.asl
View File

@ -29,11 +29,6 @@ Device (LPCB)
Offset (0x80), // IO Decode Ranges
IOD0, 8,
IOD1, 8,
Offset (0xf0), // RCBA
RCEN, 1,
, 13,
RCBA, 18,
}
#include <southbridge/intel/common/acpi/irqlinks.asl>