Commits for the new config static device design, to allow more than one static

cpu of a certain type and to eliminate the
cpu p5
cpu p6
cpu k7

nonsense in the old config files.

Next step is to hook into Eric's pci device stuff.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/k7/Config.lb

@@ -1,3 +1,4 @@
 uses k7
 uses CPU_FIXUP
+dir /cpu/p6
 #object cpufixup.o

src/cpu/k8/Config.lb

@@ -1,4 +1,6 @@
 uses CPU_FIXUP
+dir /cpu/k7
+config chip.h
 if CPU_FIXUP
   object cpufixup.o
   object apic_timer.o

src/cpu/k8/cpufixup.c

@@ -4,6 +4,9 @@
 #include <cpu/p6/msr.h>
 #include <cpu/k8/mtrr.h>
 #include <device/device.h>
+#include <device/chip.h>
+
+#include "chip.h"
 
 void k8_cpufixup(struct mem_range *mem)
 {
@@ -51,3 +54,27 @@ void k8_cpufixup(struct mem_range *mem)
 	msr.lo |= SYSCFG_MSR_MtrrVarDramEn | SYSCFG_MSR_TOM2En;
 	wrmsr(SYSCFG_MSR, msr);
 }
+
+static
+void k8_enable(struct chip *chip, enum chip_pass pass)
+{
+
+        struct cpu_k8_config *conf = (struct cpu_k8_config *)chip->chip_info;
+
+        switch (pass) {
+        case CONF_PASS_PRE_CONSOLE:
+                break;
+        default:
+                /* nothing yet */
+                break;
+        }
+}
+
+struct chip_control cpu_k8_control = {
+        enable: k8_enable,
+        name:   "AMD K8"
+};
+
+
+
+

src/cpu/p6/Config.lb

@@ -1,5 +1,6 @@
 uses i686
 uses INTEL_PPRO_MTRR
+dir /cpu/p5
 #object microcode.o
 object mtrr.o
 #object l2_cache.o

src/mainboard/arima/hdama/Config.lb

@@ -145,18 +145,21 @@ mainboardinit cpu/k8/disable_mmx_sse.inc
 ###
 northbridge amd/amdk8
 end
-southbridge amd/amd8111
+southbridge amd/amd8111 "amd8111"
 end
-southbridge amd/amd8131
+southbridge amd/amd8131 "amd8131"
 end
 #mainboardinit archi386/smp/secondary.inc
 superio NSC/pc87360
 	register "com1" = "{1}"
 	register "lpt" = "{1}"
 end
-dir /pc80
+# dir /pc80
 ##dir /src/superio/winbond/w83627hf
-cpu p5 end
-cpu p6 end
-cpu k7 end
-cpu k8 end
+dir /cpu/k8
+cpu k8 "cpu0" 
+  register "up" = "{.chip = &amd8111, .ht_width=8, .ht_speed=200}"
+end
+
+cpu k8 "cpu1" 
+end

src/mainboard/arima/hdama/mainboard.c

@@ -4,8 +4,30 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 
+#include <arch/io.h>
+#include <device/chip.h>
+#include "chip.h"
+
 
 unsigned long initial_apicid[MAX_CPUS] =
 {
 	0, 1,
 };
+
+static void
+enable(struct chip *chip, enum chip_pass pass)
+{
+
+        struct mainboard_arima_hdama_config *conf =
+                (struct mainboard_arima_hdama_config *)chip->chip_info;
+
+        switch (pass) {
+                default: break;
+        }
+
+}
+struct chip_control mainboard_arima_hdama_control = {
+                enable: enable,
+                name:   "Arima HDAMA mainboard "
+};
+

util/newconfig/config.g

@@ -21,6 +21,9 @@ alloptions = 0 # override uses at top level
 local_path = re.compile(r'^\.')
 include_pattern = re.compile(r'%%([^%]+)%%')
 
+# the cpu type for this mainboard
+cpu_type = 0
+
 # -----------------------------------------------------------------------------
 #                    Utility Classes
 # -----------------------------------------------------------------------------
@@ -1062,8 +1065,22 @@ def target(name):
 	print "Will place Makefile, crt0.S, etc. in %s" % target_dir
 
 
+def cpudir(path):
+	global cpu_type
+	if (cpu_type and (cpu_type != path)):
+		fatal("Two different CPU types: %s and %s" % (cpu_type, path))
+	srcdir = "/cpu/%s" % path
+	dodir(srcdir, "Config.lb")
+	cpu_type = path
+	
 def part(type, path, file, name):
 	global curimage, dirstack, partstack
+	# special case for 'cpu' parts. 
+	# we could add a new function too, but this is rather trivial.
+	# if the part is a cpu, and we haven't seen it before, 
+	# arrange to source the directory /cpu/'type'
+	if (type == 'cpu'):
+		cpudir(path)
 	partdir = os.path.join(type, path)
 	srcdir = os.path.join(treetop, 'src')
 	fulldir = os.path.join(srcdir, partdir)