soc/intel/cannonlake: Implement soc side VMX support
Implement required soc side API to enable VMX support using CPU_COMMON BUG=b:124518711 TEST= read msr 0x3a and verify vmx is enabled (value should be 5). Change-Id: I33dbffa6301afabd688080751ba3b85a43e00156 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31928 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -67,6 +67,7 @@ config CPU_SPECIFIC_OPTIONS
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select CACHE_MRC_SETTINGS
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select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
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select COMMON_FADT
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select CPU_INTEL_COMMON
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select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
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select FSP_M_XIP
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select GENERIC_GPIO_LIB
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@ -7,6 +7,7 @@ subdirs-y += ../../../cpu/x86/lapic
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subdirs-y += ../../../cpu/x86/mtrr
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subdirs-y += ../../../cpu/x86/smm
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subdirs-y += ../../../cpu/x86/tsc
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subdirs-y += ../../../cpu/intel/common
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bootblock-y += bootblock/bootblock.c
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bootblock-y += bootblock/cpu.c
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@ -33,6 +33,7 @@
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#include <soc/systemagent.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/intel/microcode.h>
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#include <cpu/intel/common/common.h>
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/* Convert time in seconds to POWER_LIMIT_1_TIME MSR value */
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static const u8 power_limit_time_sec_to_msr[] = {
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@ -437,6 +438,9 @@ void soc_core_init(struct device *cpu)
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/* Enable Turbo */
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enable_turbo();
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/* Enable Vmx */
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set_vmx_and_lock();
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}
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static void per_cpu_smm_trigger(void)
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