mb/asrock/h110m: disable unused serial buses
Disable spi0, i2c0 and i2c1 in the “SerialIoDevMode” register for the following reasons: 1. when the AMI BIOS is used, these pci devices are disabled in lspci.log; 2. there are no pads in the inteltool.log that use the functions of these buses Change-Id: I01ab10eb3fd41e81a1726805247c2b472d72287c Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35070 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -190,13 +190,13 @@ chip soc/intel/skylake
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# PCH UART, SPI, I2C
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register "SerialIoDevMode" = "{ \
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[PchSerialIoIndexI2C0] = PchSerialIoPci, \
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[PchSerialIoIndexI2C1] = PchSerialIoPci, \
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[PchSerialIoIndexI2C0] = PchSerialIoDisabled, \
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[PchSerialIoIndexI2C1] = PchSerialIoDisabled, \
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled, \
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[PchSerialIoIndexI2C3] = PchSerialIoDisabled, \
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[PchSerialIoIndexI2C4] = PchSerialIoDisabled, \
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[PchSerialIoIndexI2C5] = PchSerialIoDisabled, \
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[PchSerialIoIndexSpi0] = PchSerialIoPci, \
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[PchSerialIoIndexSpi0] = PchSerialIoDisabled, \
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[PchSerialIoIndexSpi1] = PchSerialIoDisabled, \
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[PchSerialIoIndexUart0] = PchSerialIoDisabled, \
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[PchSerialIoIndexUart1] = PchSerialIoDisabled, \
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