mb/google/brya: Add PsysPmax setting to 145W

This patch adds the setting of PsysPmax to 145W according to
the brya board design.

BUG=b:195615830
TEST=emerge-brya coreboot chromeos-bootimage & ensure the value is
passed to FSP by enabling FSP log & Boot into the OS

Change-Id: I996a11f76fdc0c8babe0037219f5b43e45e459dd
Signed-off-by: Ryan Lin <ryan.lin@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Ryan Lin 2021-10-05 11:38:22 +08:00 committed by Tim Wawrzynczak
parent e5824ff2a9
commit a45377e83e

View file

@ -32,6 +32,8 @@ end
chip soc/intel/alderlake
register "SaGv" = "SaGv_Enabled"
register "PsysPmax" = "145"
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port