mb/lippert/frontrunner-af: Drop dead code
This code is not even being build-tested. Drop it before it grows moss. Change-Id: I8836bf05dc84a25640dc63b41e1232d8fb1f50a9 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43245 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner
This commit is contained in:
Angel Pons
parent
7378e9cd2a
commit
a478568f5b
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@ -11,7 +11,6 @@ DefinitionBlock (
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0x00010001 /* OEM Revision */
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)
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{ /* Start of ASL file */
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/* #include <arch/i386/acpi/debug.asl> */ /* Include global debug methods if needed */
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/* Data to be patched by the BIOS during POST */
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/* FIXME the patching is not done yet! */
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@ -203,10 +202,6 @@ DefinitionBlock (
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PWMK, 1,
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PWNS, 1,
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/* Offset(0x61), */ /* Options_1 */
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/* ,7, */
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/* R617,1, */
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Offset(0x65), /* UsbPMControl */
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, 4,
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URRE, 1,
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@ -438,24 +433,20 @@ DefinitionBlock (
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} /* End Method(_SB.INTA._STA) */
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Method(_DIS ,0) {
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/* DBGO("\\_SB\\LNKA\\_DIS\n") */
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Store(0, PIRA)
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} /* End Method(_SB.INTA._DIS) */
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Method(_PRS ,0) {
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/* DBGO("\\_SB\\LNKA\\_PRS\n") */
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Return(IRQP)
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} /* Method(_SB.INTA._PRS) */
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Method(_CRS ,0) {
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/* DBGO("\\_SB\\LNKA\\_CRS\n") */
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CreateWordField(IRQB, 0x1, IRQN)
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ShiftLeft(1, PIRA, IRQN)
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Return(IRQB)
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} /* Method(_SB.INTA._CRS) */
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Method(_SRS, 1) {
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/* DBGO("\\_SB\\LNKA\\_CRS\n") */
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CreateWordField(ARG0, 1, IRQM)
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/* Use lowest available IRQ */
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@ -480,24 +471,20 @@ DefinitionBlock (
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} /* End Method(_SB.INTB._STA) */
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Method(_DIS ,0) {
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/* DBGO("\\_SB\\LNKB\\_DIS\n") */
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Store(0, PIRB)
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} /* End Method(_SB.INTB._DIS) */
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Method(_PRS ,0) {
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/* DBGO("\\_SB\\LNKB\\_PRS\n") */
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Return(IRQP)
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} /* Method(_SB.INTB._PRS) */
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Method(_CRS ,0) {
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/* DBGO("\\_SB\\LNKB\\_CRS\n") */
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CreateWordField(IRQB, 0x1, IRQN)
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ShiftLeft(1, PIRB, IRQN)
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Return(IRQB)
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} /* Method(_SB.INTB._CRS) */
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Method(_SRS, 1) {
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/* DBGO("\\_SB\\LNKB\\_CRS\n") */
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CreateWordField(ARG0, 1, IRQM)
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/* Use lowest available IRQ */
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@ -522,24 +509,20 @@ DefinitionBlock (
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} /* End Method(_SB.INTC._STA) */
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Method(_DIS ,0) {
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/* DBGO("\\_SB\\LNKC\\_DIS\n") */
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Store(0, PIRC)
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} /* End Method(_SB.INTC._DIS) */
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Method(_PRS ,0) {
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/* DBGO("\\_SB\\LNKC\\_PRS\n") */
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Return(IRQP)
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} /* Method(_SB.INTC._PRS) */
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Method(_CRS ,0) {
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/* DBGO("\\_SB\\LNKC\\_CRS\n") */
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CreateWordField(IRQB, 0x1, IRQN)
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ShiftLeft(1, PIRC, IRQN)
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Return(IRQB)
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} /* Method(_SB.INTC._CRS) */
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Method(_SRS, 1) {
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/* DBGO("\\_SB\\LNKC\\_CRS\n") */
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CreateWordField(ARG0, 1, IRQM)
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/* Use lowest available IRQ */
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@ -564,24 +547,20 @@ DefinitionBlock (
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} /* End Method(_SB.INTD._STA) */
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Method(_DIS ,0) {
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/* DBGO("\\_SB\\LNKD\\_DIS\n") */
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Store(0, PIRD)
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} /* End Method(_SB.INTD._DIS) */
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Method(_PRS ,0) {
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/* DBGO("\\_SB\\LNKD\\_PRS\n") */
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Return(IRQP)
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} /* Method(_SB.INTD._PRS) */
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Method(_CRS ,0) {
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/* DBGO("\\_SB\\LNKD\\_CRS\n") */
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CreateWordField(IRQB, 0x1, IRQN)
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ShiftLeft(1, PIRD, IRQN)
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Return(IRQB)
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} /* Method(_SB.INTD._CRS) */
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Method(_SRS, 1) {
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/* DBGO("\\_SB\\LNKD\\_CRS\n") */
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CreateWordField(ARG0, 1, IRQM)
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/* Use lowest available IRQ */
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@ -606,24 +585,20 @@ DefinitionBlock (
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} /* End Method(_SB.INTE._STA) */
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Method(_DIS ,0) {
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/* DBGO("\\_SB\\LNKE\\_DIS\n") */
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Store(0, PIRE)
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} /* End Method(_SB.INTE._DIS) */
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Method(_PRS ,0) {
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/* DBGO("\\_SB\\LNKE\\_PRS\n") */
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Return(IRQP)
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} /* Method(_SB.INTE._PRS) */
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Method(_CRS ,0) {
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/* DBGO("\\_SB\\LNKE\\_CRS\n") */
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CreateWordField(IRQB, 0x1, IRQN)
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ShiftLeft(1, PIRE, IRQN)
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Return(IRQB)
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} /* Method(_SB.INTE._CRS) */
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Method(_SRS, 1) {
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/* DBGO("\\_SB\\LNKE\\_CRS\n") */
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CreateWordField(ARG0, 1, IRQM)
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/* Use lowest available IRQ */
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@ -648,24 +623,20 @@ DefinitionBlock (
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} /* End Method(_SB.INTF._STA) */
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Method(_DIS ,0) {
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/* DBGO("\\_SB\\LNKF\\_DIS\n") */
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Store(0, PIRF)
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} /* End Method(_SB.INTF._DIS) */
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Method(_PRS ,0) {
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/* DBGO("\\_SB\\LNKF\\_PRS\n") */
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Return(PITF)
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} /* Method(_SB.INTF._PRS) */
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Method(_CRS ,0) {
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/* DBGO("\\_SB\\LNKF\\_CRS\n") */
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CreateWordField(IRQB, 0x1, IRQN)
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ShiftLeft(1, PIRF, IRQN)
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Return(IRQB)
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} /* Method(_SB.INTF._CRS) */
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Method(_SRS, 1) {
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/* DBGO("\\_SB\\LNKF\\_CRS\n") */
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CreateWordField(ARG0, 1, IRQM)
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/* Use lowest available IRQ */
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@ -690,24 +661,20 @@ DefinitionBlock (
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} /* End Method(_SB.INTG._STA) */
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Method(_DIS ,0) {
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/* DBGO("\\_SB\\LNKG\\_DIS\n") */
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Store(0, PIRG)
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} /* End Method(_SB.INTG._DIS) */
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Method(_PRS ,0) {
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/* DBGO("\\_SB\\LNKG\\_PRS\n") */
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Return(IRQP)
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} /* Method(_SB.INTG._CRS) */
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Method(_CRS ,0) {
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/* DBGO("\\_SB\\LNKG\\_CRS\n") */
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CreateWordField(IRQB, 0x1, IRQN)
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ShiftLeft(1, PIRG, IRQN)
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Return(IRQB)
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} /* Method(_SB.INTG._CRS) */
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Method(_SRS, 1) {
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/* DBGO("\\_SB\\LNKG\\_CRS\n") */
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CreateWordField(ARG0, 1, IRQM)
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/* Use lowest available IRQ */
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@ -732,24 +699,20 @@ DefinitionBlock (
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} /* End Method(_SB.INTH._STA) */
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Method(_DIS ,0) {
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/* DBGO("\\_SB\\LNKH\\_DIS\n") */
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Store(0, PIRH)
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} /* End Method(_SB.INTH._DIS) */
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Method(_PRS ,0) {
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/* DBGO("\\_SB\\LNKH\\_PRS\n") */
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Return(IRQP)
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} /* Method(_SB.INTH._CRS) */
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Method(_CRS ,0) {
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/* DBGO("\\_SB\\LNKH\\_CRS\n") */
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CreateWordField(IRQB, 0x1, IRQN)
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ShiftLeft(1, PIRH, IRQN)
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Return(IRQB)
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} /* Method(_SB.INTH._CRS) */
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Method(_SRS, 1) {
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/* DBGO("\\_SB\\LNKH\\_CRS\n") */
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CreateWordField(ARG0, 1, IRQM)
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/* Use lowest available IRQ */
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@ -763,7 +726,6 @@ DefinitionBlock (
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} /* End Scope(_SB) */
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/* Contains the supported sleep states for this chipset */
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#include <southbridge/amd/common/acpi/sleepstates.asl>
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@ -787,53 +749,17 @@ DefinitionBlock (
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* state of any device in the system.
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*/
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Method(\_PTS, 1) {
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/* DBGO("\\_PTS\n") */
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/* DBGO("From S0 to S") */
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/* DBGO(Arg0) */
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/* DBGO("\n") */
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/* Don't allow PCIRST# to reset USB */
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if (LEqual(Arg0,3)){
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Store(0,URRE)
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}
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/* Clear sleep SMI status flag and enable sleep SMI trap. */
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/*Store(One, CSSM)
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Store(One, SSEN)*/
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/* On older chips, clear PciExpWakeDisEn */
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/*if (LLessEqual(\_SB.SBRI, 0x13)) {
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* Store(0,\_SB.PWDE)
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*}
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*/
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/* Clear wake status structure. */
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Store(0, Index(WKST,0))
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Store(0, Index(WKST,1))
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} /* End Method(\_PTS) */
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/*
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* The following method results in a "not a valid reserved NameSeg"
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* warning so I have commented it out for the duration. It isn't
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* used, so it could be removed.
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*
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*
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* \_GTS OEM Going To Sleep method
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*
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* Entry:
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* Arg0=The value of the sleeping state S1=1, S2=2
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*
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* Exit:
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* -none-
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*
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* Method(\_GTS, 1) {
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* DBGO("\\_GTS\n")
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* DBGO("From S0 to S")
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* DBGO(Arg0)
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* DBGO("\n")
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* }
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*/
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/*
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* \_BFS OEM Back From Sleep method
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*
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@ -844,10 +770,6 @@ DefinitionBlock (
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* -none-
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*/
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Method(\_BFS, 1) {
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/* DBGO("\\_BFS\n") */
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/* DBGO("From S") */
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/* DBGO(Arg0) */
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/* DBGO(" to S0\n") */
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}
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/*
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@ -866,10 +788,6 @@ DefinitionBlock (
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* if non-zero the effective S-state the power supply entered
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*/
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Method(\_WAK, 1) {
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/* DBGO("\\_WAK\n") */
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/* DBGO("From S") */
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/* DBGO(Arg0) */
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/* DBGO(" to S0\n") */
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/* Re-enable HPET */
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Store(1,HPDE)
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@ -883,84 +801,26 @@ DefinitionBlock (
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Store(PWST, Local1)
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Store(Local1, PWST)
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/* if (DeRefOf(Index(WKST,0))) {
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* Store(0, Index(WKST,1))
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* } else {
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* Store(Arg0, Index(WKST,1))
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* }
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*/
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Return(WKST)
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} /* End Method(\_WAK) */
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Scope(\_GPE) { /* Start Scope GPE */
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/* General event 0 */
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/* Method(_L00) {
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* DBGO("\\_GPE\\_L00\n")
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* }
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*/
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/* General event 1 */
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/* Method(_L01) {
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* DBGO("\\_GPE\\_L00\n")
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* }
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*/
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/* General event 2 */
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/* Method(_L02) {
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* DBGO("\\_GPE\\_L00\n")
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* }
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*/
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/* General event 3 */
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Method(_L03) {
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/* DBGO("\\_GPE\\_L00\n") */
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Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
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}
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/* General event 4 */
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/* Method(_L04) {
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* DBGO("\\_GPE\\_L00\n")
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* }
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*/
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/* General event 5 */
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/* Method(_L05) {
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* DBGO("\\_GPE\\_L00\n")
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* }
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*/
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/* General event 6 - Used for GPM6, moved to USB.asl */
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/* Method(_L06) {
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* DBGO("\\_GPE\\_L00\n")
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* }
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*/
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/* General event 7 - Used for GPM7, moved to USB.asl */
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/* Method(_L07) {
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* DBGO("\\_GPE\\_L07\n")
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* }
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*/
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/* Legacy PM event */
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Method(_L08) {
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/* DBGO("\\_GPE\\_L08\n") */
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}
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/* Temp warning (TWarn) event */
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Method(_L09) {
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/* DBGO("\\_GPE\\_L09\n") */
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/* Notify (\_TZ.TZ00, 0x80) */
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}
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/* Reserved */
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/* Method(_L0A) {
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* DBGO("\\_GPE\\_L0A\n")
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* }
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*/
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/* USB controller PME# */
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Method(_L0B) {
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/* DBGO("\\_GPE\\_L0B\n") */
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Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
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Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
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Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
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@ -971,80 +831,17 @@ DefinitionBlock (
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Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
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}
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/* AC97 controller PME# */
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/* Method(_L0C) {
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* DBGO("\\_GPE\\_L0C\n")
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* }
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*/
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/* OtherTherm PME# */
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/* Method(_L0D) {
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* DBGO("\\_GPE\\_L0D\n")
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* }
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*/
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/* GPM9 SCI event - Moved to USB.asl */
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/* Method(_L0E) {
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* DBGO("\\_GPE\\_L0E\n")
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* }
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*/
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/* PCIe HotPlug event */
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/* Method(_L0F) {
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* DBGO("\\_GPE\\_L0F\n")
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* }
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*/
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/* ExtEvent0 SCI event */
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Method(_L10) {
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/* DBGO("\\_GPE\\_L10\n") */
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}
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/* ExtEvent1 SCI event */
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Method(_L11) {
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/* DBGO("\\_GPE\\_L11\n") */
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}
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/* PCIe PME# event */
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/* Method(_L12) {
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* DBGO("\\_GPE\\_L12\n")
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* }
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*/
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/* GPM0 SCI event - Moved to USB.asl */
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/* Method(_L13) {
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* DBGO("\\_GPE\\_L13\n")
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* }
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*/
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/* GPM1 SCI event - Moved to USB.asl */
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/* Method(_L14) {
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* DBGO("\\_GPE\\_L14\n")
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* }
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*/
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/* GPM2 SCI event - Moved to USB.asl */
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/* Method(_L15) {
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* DBGO("\\_GPE\\_L15\n")
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* }
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*/
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/* GPM3 SCI event - Moved to USB.asl */
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/* Method(_L16) {
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* DBGO("\\_GPE\\_L16\n")
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* }
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*/
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/* GPM8 SCI event - Moved to USB.asl */
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/* Method(_L17) {
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* DBGO("\\_GPE\\_L17\n")
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* }
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*/
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/* GPIO0 or GEvent8 event */
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Method(_L18) {
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/* DBGO("\\_GPE\\_L18\n") */
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Notify(\_SB.PCI0.PBR2, 0x02) /* NOTIFY_DEVICE_WAKE */
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Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
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Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
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@ -1053,49 +850,12 @@ DefinitionBlock (
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Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
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}
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/* GPM4 SCI event - Moved to USB.asl */
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/* Method(_L19) {
|
||||
* DBGO("\\_GPE\\_L19\n")
|
||||
* }
|
||||
*/
|
||||
|
||||
/* GPM5 SCI event - Moved to USB.asl */
|
||||
/* Method(_L1A) {
|
||||
* DBGO("\\_GPE\\_L1A\n")
|
||||
* }
|
||||
*/
|
||||
|
||||
/* Azalia SCI event */
|
||||
Method(_L1B) {
|
||||
/* DBGO("\\_GPE\\_L1B\n") */
|
||||
Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
|
||||
Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
|
||||
}
|
||||
|
||||
/* GPM6 SCI event - Reassigned to _L06 */
|
||||
/* Method(_L1C) {
|
||||
* DBGO("\\_GPE\\_L1C\n")
|
||||
* }
|
||||
*/
|
||||
|
||||
/* GPM7 SCI event - Reassigned to _L07 */
|
||||
/* Method(_L1D) {
|
||||
* DBGO("\\_GPE\\_L1D\n")
|
||||
* }
|
||||
*/
|
||||
|
||||
/* GPIO2 or GPIO66 SCI event */
|
||||
/* Method(_L1E) {
|
||||
* DBGO("\\_GPE\\_L1E\n")
|
||||
* }
|
||||
*/
|
||||
|
||||
/* SATA SCI event - Moved to sata.asl */
|
||||
/* Method(_L1F) {
|
||||
* DBGO("\\_GPE\\_L1F\n")
|
||||
* }
|
||||
*/
|
||||
|
||||
} /* End Scope GPE */
|
||||
|
||||
#include "acpi/usb.asl"
|
||||
|
|
@ -1134,7 +894,6 @@ DefinitionBlock (
|
|||
Return(0)
|
||||
}
|
||||
Method(_STA, 0) {
|
||||
/* DBGO("\\_SB\\PCI0\\_STA\n") */
|
||||
Return(0x0B) /* Status is visible */
|
||||
}
|
||||
|
||||
|
|
@ -1342,9 +1101,6 @@ DefinitionBlock (
|
|||
|
||||
Device(LIBR) {
|
||||
Name(_ADR, 0x00140003)
|
||||
/* Method(_INI) {
|
||||
* DBGO("\\_SB\\PCI0\\LpcIsaBr\\_INI\n")
|
||||
} */ /* End Method(_SB.SBRDG._INI) */
|
||||
|
||||
/* Real Time Clock Device */
|
||||
Device(RTC0) {
|
||||
|
|
@ -1352,7 +1108,6 @@ DefinitionBlock (
|
|||
Name(_CRS, ResourceTemplate() {
|
||||
IRQNoFlags(){8}
|
||||
IO(Decode16,0x0070, 0x0070, 0, 2)
|
||||
/* IO(Decode16,0x0070, 0x0070, 0, 4) */
|
||||
})
|
||||
} /* End Device(_SB.PCI0.LpcIsaBr.RTC0) */
|
||||
|
||||
|
|
@ -1361,7 +1116,6 @@ DefinitionBlock (
|
|||
Name(_CRS, ResourceTemplate() {
|
||||
IRQNoFlags(){0}
|
||||
IO(Decode16, 0x0040, 0x0040, 0, 4)
|
||||
/* IO(Decode16, 0x0048, 0x0048, 0, 4) */
|
||||
})
|
||||
} /* End Device(_SB.PCI0.LpcIsaBr.TMR) */
|
||||
|
||||
|
|
@ -1378,8 +1132,6 @@ DefinitionBlock (
|
|||
IRQNoFlags(){2}
|
||||
IO(Decode16,0x0020, 0x0020, 0, 2)
|
||||
IO(Decode16,0x00A0, 0x00A0, 0, 2)
|
||||
/* IO(Decode16, 0x00D0, 0x00D0, 0x10, 0x02) */
|
||||
/* IO(Decode16, 0x04D0, 0x04D0, 0x10, 0x02) */
|
||||
})
|
||||
} /* End Device(_SB.PCI0.LpcIsaBr.PIC) */
|
||||
|
||||
|
|
@ -1403,22 +1155,6 @@ DefinitionBlock (
|
|||
IRQNoFlags(){13}
|
||||
})
|
||||
} /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
|
||||
#if 0
|
||||
Device(HPTM) {
|
||||
Name(_HID,EISAID("PNP0103"))
|
||||
Name(CRS,ResourceTemplate() {
|
||||
Memory32Fixed(ReadOnly,0xFED00000, 0x00000400, HPT) /* 1kb reserved space */
|
||||
})
|
||||
Method(_STA, 0) {
|
||||
Return(0x0F) /* sata is visible */
|
||||
}
|
||||
Method(_CRS, 0) {
|
||||
CreateDwordField(CRS, ^HPT._BAS, HPBX)
|
||||
Store(HPBA, HPBX)
|
||||
Return(CRS)
|
||||
}
|
||||
} /* End Device(_SB.PCI0.LpcIsaBr.COPR) */
|
||||
#endif
|
||||
#include "acpi/superio.asl"
|
||||
} /* end LIBR */
|
||||
|
||||
|
|
@ -1472,91 +1208,11 @@ DefinitionBlock (
|
|||
)
|
||||
|
||||
Memory32Fixed(READONLY, 0x000A0000, 0x00020000, VGAM) /* VGA memory space */
|
||||
#if 0
|
||||
Memory32Fixed(READONLY, 0x000C0000, 0x00020000, EMM1) /* Assume C0000-E0000 empty */
|
||||
Memory32Fixed(READONLY, 0x000E0000, 0x00020000, RDBS) /* BIOS ROM area */
|
||||
|
||||
/* DRAM Memory from 1MB to TopMem */
|
||||
Memory32Fixed(READWRITE, 0x00100000, 0, DMLO) /* 1MB to TopMem */
|
||||
|
||||
/* BIOS space just below 4GB */
|
||||
DWORDMemory(
|
||||
ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
|
||||
0x00, /* Granularity */
|
||||
0x00000000, /* Min */
|
||||
0x00000000, /* Max */
|
||||
0x00000000, /* Translation */
|
||||
0x00000001, /* Max-Min, RLEN */
|
||||
,,
|
||||
PCBM
|
||||
)
|
||||
|
||||
/* DRAM memory from 4GB to TopMem2 */
|
||||
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
|
||||
0x00000000, /* Granularity */
|
||||
0x00000000, /* Min */
|
||||
0x00000000, /* Max */
|
||||
0x00000000, /* Translation */
|
||||
0x00000001, /* Max-Min, RLEN */
|
||||
,,
|
||||
DMHI
|
||||
)
|
||||
|
||||
/* BIOS space just below 16EB */
|
||||
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
|
||||
0x00000000, /* Granularity */
|
||||
0x00000000, /* Min */
|
||||
0x00000000, /* Max */
|
||||
0x00000000, /* Translation */
|
||||
0x00000001, /* Max-Min, RLEN */
|
||||
,,
|
||||
PEBM
|
||||
)
|
||||
#endif
|
||||
/* memory space for PCI BARs below 4GB */
|
||||
Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO)
|
||||
}) /* End Name(_SB.PCI0.CRES) */
|
||||
|
||||
Method(_CRS, 0) {
|
||||
/* DBGO("\\_SB\\PCI0\\_CRS\n") */
|
||||
#if 0
|
||||
CreateDWordField(CRES, ^EMM1._BAS, EM1B)
|
||||
CreateDWordField(CRES, ^EMM1._LEN, EM1L)
|
||||
CreateDWordField(CRES, ^DMLO._BAS, DMLB)
|
||||
CreateDWordField(CRES, ^DMLO._LEN, DMLL)
|
||||
CreateDWordField(CRES, ^PCBM._MIN, PBMB)
|
||||
CreateDWordField(CRES, ^PCBM._LEN, PBML)
|
||||
|
||||
CreateQWordField(CRES, ^DMHI._MIN, DMHB)
|
||||
CreateQWordField(CRES, ^DMHI._LEN, DMHL)
|
||||
CreateQWordField(CRES, ^PEBM._MIN, EBMB)
|
||||
CreateQWordField(CRES, ^PEBM._LEN, EBML)
|
||||
|
||||
If(LGreater(LOMH, 0xC0000)){
|
||||
Store(0xC0000, EM1B) /* Hole above C0000 and below E0000 */
|
||||
Subtract(LOMH, 0xC0000, EM1L) /* subtract start, assumes allocation from C0000 going up */
|
||||
}
|
||||
|
||||
/* Set size of memory from 1MB to TopMem */
|
||||
Subtract(TOM1, 0x100000, DMLL)
|
||||
|
||||
/*
|
||||
* If(LNotEqual(TOM2, 0x00000000)){
|
||||
* Store(0x100000000,DMHB) DRAM from 4GB to TopMem2
|
||||
* Subtract(TOM2, 0x100000000, DMHL)
|
||||
* }
|
||||
*/
|
||||
|
||||
/* If there is no memory above 4GB, put the BIOS just below 4GB */
|
||||
If(LEqual(TOM2, 0x00000000)){
|
||||
Store(PBAD,PBMB) /* Reserve the "BIOS" space */
|
||||
Store(PBLN,PBML)
|
||||
}
|
||||
Else { /* Otherwise, put the BIOS just below 16EB */
|
||||
ShiftLeft(PBAD,16,EBMB) /* Reserve the "BIOS" space */
|
||||
Store(PBLN,EBML)
|
||||
}
|
||||
#endif
|
||||
CreateDWordField(CRES, ^MMIO._BAS, MM1B)
|
||||
CreateDWordField(CRES, ^MMIO._LEN, MM1L)
|
||||
/*
|
||||
|
|
@ -1584,27 +1240,8 @@ DefinitionBlock (
|
|||
* value is based on user choice in BIOS setup.
|
||||
*/
|
||||
Method(_INI, 0) {
|
||||
/* DBGO("\\_SB\\_INI\n") */
|
||||
/* DBGO(" DSDT.ASL code from ") */
|
||||
/* DBGO(__DATE__) */
|
||||
/* DBGO(" ") */
|
||||
/* DBGO(__TIME__) */
|
||||
/* DBGO("\n Sleep states supported: ") */
|
||||
/* DBGO("\n") */
|
||||
/* DBGO(" \\_OS=") */
|
||||
/* DBGO(\_OS) */
|
||||
/* DBGO("\n \\_REV=") */
|
||||
/* DBGO(\_REV) */
|
||||
/* DBGO("\n") */
|
||||
|
||||
/* Determine the OS we're running on */
|
||||
OSFL()
|
||||
|
||||
/* On older chips, clear PciExpWakeDisEn */
|
||||
/*if (LLessEqual(\SBRI, 0x13)) {
|
||||
* Store(0,\PWDE)
|
||||
* }
|
||||
*/
|
||||
} /* End Method(_SB._INI) */
|
||||
} /* End Device(PCI0) */
|
||||
|
||||
|
|
@ -1618,10 +1255,6 @@ DefinitionBlock (
|
|||
|
||||
Scope(\_SI) {
|
||||
Method(_SST, 1) {
|
||||
/* DBGO("\\_SI\\_SST\n") */
|
||||
/* DBGO(" New Indicator state: ") */
|
||||
/* DBGO(Arg0) */
|
||||
/* DBGO("\n") */
|
||||
}
|
||||
} /* End Scope SI */
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue