* Added support for "fast" (64-clock) refresh

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* Added code to support remap window for 3 - 4 GB systems
* Fixed premature configuration of true row boundaries that resulted in some sections of DRAM not receiving JEDEC commands (see http://openbios.org/pipermail/linuxbios/2005-June/011752.html).
* Redefined RCOMP_MMIO so that RCOMP registers can be configured on systems where A20M# is asserted.
* Disabled subsystem (vendor) ID configuration
* #ifdef'd out suspicious looking code (see http://openbios.org/pipermail/linuxbios/2005-June/011759.html)
* Added optional run-time checking of dual-channel compatibility of installed DIMMs 
* Move JEDEC SPD and SDRAM definitions into reusable #include files

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

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This commit is contained in:

Steven J. Magnani 2005-09-26 13:54:32 +00:00

parent 87888630b2

commit a4baa1673e

1 changed files with 1534 additions and 1285 deletions

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src/northbridge/intel/e7501/raminit.c

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