From a4dddfc3a3a48727ebcec727a0b1fd87eb4c14ad Mon Sep 17 00:00:00 2001
From: Nick Vaccaro <nvaccaro@google.com>
Date: Mon, 20 Dec 2021 12:21:40 -0800
Subject: [PATCH] Revert "vendorcode/intel/fsp: Add Alder Lake FSP headers for
 FSP v2471_02"

This reverts commit ae0ea32c52905d6bcb527b04727463bc2d1b9e09.
This change should not have merged until the 2471_02 FSP change is ready
for merge.

BUG=b:211481222
TEST='emerge-brya coreboot chromeos-bootimage', flash and boot brya0
to kernel.

Change-Id: Iae5b0c53ace196053e1e155efd2e08f438979ba7
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60262
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhuohao Lee <zhuohao@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
---
 src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h | 8 ++++----
 src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h | 9 +++++----
 2 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
index 191ef276bc..271e01cf39 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h
@@ -3164,7 +3164,7 @@ typedef struct {
 
 /** Offset 0x0AA8 - Reserved
 **/
-  UINT8                       Reserved45[136];
+  UINT8                       Reserved45[104];
 } FSP_M_CONFIG;
 
 /** Fsp M UPD Configuration
@@ -3183,11 +3183,11 @@ typedef struct {
 **/
   FSP_M_CONFIG                FspmConfig;
 
-/** Offset 0x0B30
+/** Offset 0x0B10
 **/
-  UINT8                       UnusedUpdSpace34[6];
+  UINT8                       UnusedUpdSpace31[6];
 
-/** Offset 0x0B36
+/** Offset 0x0B16
 **/
   UINT16                      UpdTerminator;
 } FSPM_UPD;
diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
index a73fe59f1e..ddf6ca87ff 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
@@ -3380,7 +3380,8 @@ typedef struct {
   UINT8                       ProcHotLock;
 
 /** Offset 0x0CF3 - Configuration for boot TDP selection
-  Deprecated. Move to premem.
+  Configuration for boot TDP selection; <b>0: TDP Nominal</b>; 1: TDP Down; 2: TDP
+  Up;0xFF : Deactivate
 **/
   UINT8                       ConfigTdpLevel;
 
@@ -3868,7 +3869,7 @@ typedef struct {
 
 /** Offset 0x0FD5 - Reserved
 **/
-  UINT8                       Reserved56[123];
+  UINT8                       Reserved56[19];
 } FSP_S_CONFIG;
 
 /** Fsp S UPD Configuration
@@ -3887,11 +3888,11 @@ typedef struct {
 **/
   FSP_S_CONFIG                FspsConfig;
 
-/** Offset 0x1050
+/** Offset 0x0FE8
 **/
   UINT8                       UnusedUpdSpace42[6];
 
-/** Offset 0x1056
+/** Offset 0x0FEE
 **/
   UINT16                      UpdTerminator;
 } FSPS_UPD;