arch/non-x86: Remove use of __PRE_RAM__

Change-Id: Id8918f40572497b068509b5d5a490de0435ad50b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

src/arch/arm/include/armv7/arch/cpu.h

@@ -17,12 +17,10 @@
 #define __ARCH_CPU_H__
 
 #include <stdint.h>
+#include <device/device.h>
 
 #define asmlinkage
 
-#if !defined(__PRE_RAM__)
-#include <device/device.h>
-
 struct cpu_driver {
 	struct device_operations *ops;
 	const struct cpu_device_id *id_table;
@@ -34,8 +32,6 @@ struct cpuinfo_arm {
 	uint8_t    arm_model;
 };
 
-#endif
-
 /* Primitives for CPU and MP cores. */
 
 /* read Main Id register (MIDR) */

src/arch/arm64/include/armv8/arch/cpu.h

@@ -20,9 +20,6 @@
 
 static inline unsigned int smp_processor_id(void) { return 0; }
 
-
-#if !defined(__PRE_RAM__)
 struct cpu_driver { };
-#endif
 
 #endif /* __ARCH_CPU_H__ */

src/arch/mips/include/arch/cpu.h

@@ -16,12 +16,10 @@
 #ifndef __MIPS_ARCH_CPU_H
 #define __MIPS_ARCH_CPU_H
 
-#define asmlinkage
-
-#ifndef __PRE_RAM__
-
 #include <device/device.h>
 
+#define asmlinkage
+
 struct cpu_driver {
 	struct device_operations *ops;
 	const struct cpu_device_id *id_table;
@@ -34,7 +32,6 @@ struct cpu_info {
 	unsigned long index;
 };
 
-#endif /* !__PRE_RAM__ */
 
 /***************************************************************************
  * The following section was copied from arch/mips/include/asm/mipsregs.h in

src/arch/ppc64/include/arch/cpu.h

@@ -16,11 +16,10 @@
 #ifndef __ARCH_CPU_H__
 #define __ARCH_CPU_H__
 
-#define asmlinkage
-
-#if !defined(__PRE_RAM__)
 #include <device/device.h>
 
+#define asmlinkage
+
 struct cpu_driver {
 	struct device_operations *ops;
 	const struct cpu_device_id *id_table;
@@ -42,7 +41,6 @@ struct cpuinfo_ppc64 {
 	uint8_t    ppc64_model;
 };
 
-#endif
-
 struct cpu_info *cpu_info(void);
+
 #endif /* __ARCH_CPU_H__ */

src/arch/riscv/include/arch/cpu.h

@@ -17,12 +17,10 @@
 #define __ARCH_CPU_H__
 
 #include <arch/encoding.h>
+#include <device/device.h>
 
 #define asmlinkage
 
-#if !defined(__PRE_RAM__)
-#include <device/device.h>
-
 struct cpu_driver {
 	struct device_operations *ops;
 	const struct cpu_device_id *id_table;
@@ -44,8 +42,6 @@ struct cpuinfo_riscv {
 	uint8_t    riscv_model;
 };
 
-#endif
-
 static inline int supports_extension(char ext)
 {
 	return read_csr(misa) & (1 << (ext - 'A'));

src/cpu/ti/am335x/uart.c

@@ -182,7 +182,6 @@ void uart_tx_flush(int idx)
 {
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -194,4 +193,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/drivers/uart/pl011.c

@@ -49,7 +49,6 @@ unsigned char uart_rx_byte(int idx)
 	return read8(&regs->dr);
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -63,4 +62,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/drivers/uart/sifive.c

@@ -113,9 +113,7 @@ unsigned int uart_input_clock_divider(void)
 	return 1;
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	/* TODO */
 }
-#endif

src/mainboard/emulation/qemu-power8/uart.c

@@ -41,7 +41,6 @@ void uart_tx_flush(int idx)
 {
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -53,4 +52,3 @@ void uart_fill_lb(void *data)
 	lb_add_serial(&serial, data);
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/soc/imgtec/pistachio/uart.c

@@ -143,7 +143,6 @@ void uart_tx_flush(int idx)
 	uart8250_mem_tx_flush(CONFIG_CONSOLE_SERIAL_UART_ADDRESS);
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -155,4 +154,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/soc/mediatek/common/uart.c

@@ -172,7 +172,6 @@ void uart_tx_flush(int idx)
 	mtk_uart_tx_flush();
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -185,4 +184,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/soc/nvidia/tegra/dc.h

@@ -515,9 +515,7 @@ struct tegra_dc_mode {
 unsigned long READL(void *p);
 void WRITEL(unsigned long value, void *p);
 
-#ifndef __PRE_RAM__
 void display_startup(struct device *dev);
-#endif
 void dp_init(void *_config);
 void dp_enable(void *_dp);
 unsigned int fb_base_mb(void);

src/soc/nvidia/tegra124/uart.c

@@ -128,7 +128,6 @@ void uart_tx_flush(int idx)
 	tegra124_uart_tx_flush(uart_ptr);
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -140,4 +139,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/soc/nvidia/tegra210/uart.c

@@ -115,7 +115,6 @@ unsigned char uart_rx_byte(int idx)
 	return tegra210_uart_rx_byte();
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -127,4 +126,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/soc/qualcomm/ipq40xx/blobs_init.c

@@ -58,8 +58,6 @@ static void *load_ipq_blob(const char *file_name)
 	return blob_mbn;
 }
 
-#ifdef __PRE_RAM__
-
 #define DDR_VERSION() ((const char *)"private build")
 #define MAX_DDR_VERSION_SIZE 48
 
@@ -120,7 +118,6 @@ int initialize_dram(void)
 	return 0;
 }
 
-#else  /* __PRE_RAM__ */
 void start_tzbsp(void)
 {
 	void *tzbsp = load_ipq_blob(CONFIG_TZ_MBN);
@@ -133,4 +130,3 @@ void start_tzbsp(void)
 	tz_init_wrapper(0, 0, tzbsp);
 
 }
-#endif  /* !__PRE_RAM__ */

src/soc/qualcomm/ipq40xx/uart.c

@@ -283,7 +283,6 @@ uint8_t uart_rx_byte(int idx)
 	return byte;
 }
 
-#ifndef __PRE_RAM__
 /* TODO: Implement function */
 void uart_fill_lb(void *data)
 {
@@ -297,4 +296,3 @@ void uart_fill_lb(void *data)
 	lb_add_serial(&serial, data);
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/soc/qualcomm/ipq806x/blobs_init.c

@@ -57,8 +57,6 @@ static void *load_ipq_blob(const char *file_name)
 	return blob_mbn + 1;
 }
 
-#ifdef __PRE_RAM__
-
 #define DDR_VERSION() ((const char *)0x2a03f600)
 #define MAX_DDR_VERSION_SIZE 48
 
@@ -89,8 +87,6 @@ int initialize_dram(void)
 	return 0;
 }
 
-#else  /* __PRE_RAM__ */
-
 void start_tzbsp(void)
 {
 	void *tzbsp = load_ipq_blob("tz.mbn");
@@ -152,4 +148,3 @@ void start_rpm(void)
 	       (rpm_version >> 16) & 0xff,
 	       rpm_version & 0xffff);
 }
-#endif  /* !__PRE_RAM__ */

src/soc/qualcomm/ipq806x/uart.c

@@ -398,9 +398,7 @@ uint8_t uart_rx_byte(int idx)
 	return byte;
 }
 
-#ifndef __PRE_RAM__
 /* TODO: Implement fuction */
 void uart_fill_lb(void *data)
 {
 }
-#endif

src/soc/qualcomm/qcs405/uart.c

@@ -287,7 +287,6 @@ uint8_t uart_rx_byte(int idx)
 }
 #endif
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -300,4 +299,3 @@ void uart_fill_lb(void *data)
 	lb_add_serial(&serial, data);
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/soc/samsung/exynos5250/uart.c

@@ -185,7 +185,6 @@ void uart_tx_flush(int idx)
 	exynos5_uart_tx_flush(uart);
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -197,4 +196,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif

src/soc/samsung/exynos5420/uart.c

@@ -176,7 +176,6 @@ void uart_tx_flush(int idx)
 	/* Exynos5250 implements this too. */
 }
 
-#ifndef __PRE_RAM__
 void uart_fill_lb(void *data)
 {
 	struct lb_serial serial;
@@ -190,4 +189,3 @@ void uart_fill_lb(void *data)
 
 	lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
 }
-#endif