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security/intel/stm: Use correct SMBASE for SMM descriptor setup 

Commit ea3376c (SMM module loader version 2) changedhow the
SMBASE is calculated.

This patch modifies setup_smm_descriptor to properly acquire the
SMBASE.

This patch has been tested on a Purism L1UM-1X8C and a Purism 15v4.

Signed-off-by: Eugene Myers <cedarhouse@comcast.net>
Change-Id: I1d62a36cdcbc20a19c42266164e612fb96f91953
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61688
Reviewed-by: Eugene Myers <cedarhouse1@comcast.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Eugene Myers 2022-02-07 16:27:26 -05:00 committed by Felix Held
parent b582ce0814
commit a514192ffe
2 changed files with 6 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/security/intel/stm/SmmStm.h
View File

@ -75,7 +75,7 @@ void notify_stm_resource_change(void *stm_resource);
*/
void *get_stm_resource(void);
void setup_smm_descriptor(void *smbase, void *base_smbase, int32_t apic_id,
void setup_smm_descriptor(void *smbase, int32_t apic_id,
int32_t entry32_off);
/*

11
src/security/intel/stm/StmPlatformSmm.c
View File

@ -77,8 +77,7 @@ static void read_gdtr(struct descriptor *gdtr)
__asm__ __volatile__("sgdt %0" : "=m"(*gdtr));
}
void setup_smm_descriptor(void *smbase, void *base_smbase, int32_t apic_id,
int32_t entry32_off)
void setup_smm_descriptor(void *smbase, int32_t apic_id, int32_t entry32_off)
{
struct descriptor gdtr;
void *smbase_processor;
@ -103,7 +102,7 @@ void setup_smm_descriptor(void *smbase, void *base_smbase, int32_t apic_id,
psd->smm_descriptor_ver_minor =
TXT_PROCESSOR_SMM_DESCRIPTOR_VERSION_MINOR;
psd->smm_smi_handler_rip =
(uint64_t)((uintptr_t)base_smbase + SMM_ENTRY_OFFSET +
(uint64_t)((uintptr_t)smbase + SMM_ENTRY_OFFSET +
entry32_off);
psd->local_apic_id = apic_id;
psd->size = sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR);
@ -123,7 +122,7 @@ void setup_smm_descriptor(void *smbase, void *base_smbase, int32_t apic_id,
read_gdtr(&gdtr);
gdtr.base -= (uintptr_t) smbase_processor;
gdtr.base += (uintptr_t) base_smbase;
gdtr.base += (uintptr_t) smbase;
psd->smm_gdt_ptr = gdtr.base;
psd->smm_gdt_size = gdtr.limit + 1; // the stm will subtract, so add
@ -183,8 +182,8 @@ void stm_setup(uintptr_t mseg, int cpu, uintptr_t smbase,
cpu, MsegChk.hi, MsegChk.lo);
// setup the descriptor for this cpu
setup_smm_descriptor((void *)smbase, (void *) base_smbase,
cpu, offset32);
setup_smm_descriptor((void *)smbase, cpu, offset32);
} else {
printk(BIOS_DEBUG,
"STM: Error in STM load, STM not enabled: %d\n",