Following patch moves all vt8237 fadt.c from mainboard/* file to chipset
directory just with one common file. Changes to FADT: move to rev4, fix the generic register descriptors, detect additional VT8237S features. Change the compiler to CORE , its revision to 42. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
608762793a
commit
a519fe77b6
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@ -28,7 +28,6 @@ arch i386 end
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driver mainboard.o
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if HAVE_ACPI_TABLES
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object acpi_tables.o
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object fadt.o
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makerule dsdt.c
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depends "$(MAINBOARD)/dsdt.asl"
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action "iasl -p $(CURDIR)/dsdt -tc $(MAINBOARD)/dsdt.asl"
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@ -1,153 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
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* Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <string.h>
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#include <arch/acpi.h>
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#include <../../../southbridge/via/vt8237r/vt8237r.h>
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/**
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* Create the Fixed ACPI Description Tables (FADT) for this board.
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*/
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void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
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{
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acpi_header_t *header = &(fadt->header);
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memset((void *) fadt, 0, sizeof(acpi_fadt_t));
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memcpy(header->signature, "FACP", 4);
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header->length = 244;
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header->revision = 1;
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memcpy(header->oem_id, "LXBIOS", 6);
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memcpy(header->oem_table_id, "LXBACPI ", 8);
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memcpy(header->asl_compiler_id, "IASL", 4);
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header->asl_compiler_revision = 0;
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fadt->firmware_ctrl = facs;
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fadt->dsdt = dsdt;
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fadt->preferred_pm_profile = 0;
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fadt->sci_int = 9;
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fadt->smi_cmd = 0;
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fadt->acpi_enable = 0;
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fadt->acpi_disable = 0;
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fadt->s4bios_req = 0x0;
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fadt->pstate_cnt = 0x0;
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fadt->pm1a_evt_blk = VT8237R_ACPI_IO_BASE;
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fadt->pm1b_evt_blk = 0x0;
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fadt->pm1a_cnt_blk = VT8237R_ACPI_IO_BASE + 0x4;
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fadt->pm1b_cnt_blk = 0x0;
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fadt->pm2_cnt_blk = 0x0;
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fadt->pm_tmr_blk = VT8237R_ACPI_IO_BASE + 0x8;
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fadt->gpe0_blk = VT8237R_ACPI_IO_BASE + 0x20;
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fadt->gpe1_blk = 0x0;
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fadt->pm1_evt_len = 4;
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fadt->pm1_cnt_len = 2;
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fadt->pm2_cnt_len = 0;
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fadt->pm_tmr_len = 4;
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fadt->gpe0_blk_len = 4;
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fadt->gpe1_blk_len = 0;
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fadt->gpe1_base = 0;
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fadt->cst_cnt = 0;
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fadt->p_lvl2_lat = 90;
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fadt->p_lvl3_lat = 900;
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fadt->flush_size = 0;
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fadt->flush_stride = 0;
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fadt->duty_offset = 0;
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fadt->duty_width = 1; //??
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fadt->day_alrm = 0x7d;
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fadt->mon_alrm = 0x7e;
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fadt->century = 0x32;
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/* fixme 5 - 10 */
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fadt->iapc_boot_arch = 0x1;
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/* fixme */
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fadt->flags = 0x4a5;
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fadt->reset_reg.space_id = 0;
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fadt->reset_reg.bit_width = 0;
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fadt->reset_reg.bit_offset = 0;
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fadt->reset_reg.resv = 0;
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fadt->reset_reg.addrl = 0x0;
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fadt->reset_reg.addrh = 0x0;
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fadt->reset_value = 0;
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fadt->x_firmware_ctl_l = facs;
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fadt->x_firmware_ctl_h = 0;
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fadt->x_dsdt_l = dsdt;
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fadt->x_dsdt_h = 0;
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fadt->x_pm1a_evt_blk.space_id = 1;
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fadt->x_pm1a_evt_blk.bit_width = 4;
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fadt->x_pm1a_evt_blk.bit_offset = 0;
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fadt->x_pm1a_evt_blk.resv = 0;
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fadt->x_pm1a_evt_blk.addrl = VT8237R_ACPI_IO_BASE;
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fadt->x_pm1a_evt_blk.addrh = 0x0;
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fadt->x_pm1b_evt_blk.space_id = 1;
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fadt->x_pm1b_evt_blk.bit_width = 4;
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fadt->x_pm1b_evt_blk.bit_offset = 0;
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fadt->x_pm1b_evt_blk.resv = 0;
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fadt->x_pm1b_evt_blk.addrl = 0x0;
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fadt->x_pm1b_evt_blk.addrh = 0x0;
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fadt->x_pm1a_cnt_blk.space_id = 1;
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fadt->x_pm1a_cnt_blk.bit_width = 2;
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fadt->x_pm1a_cnt_blk.bit_offset = 0;
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fadt->x_pm1a_cnt_blk.resv = 0;
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fadt->x_pm1a_cnt_blk.addrl = VT8237R_ACPI_IO_BASE + 0x4;
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fadt->x_pm1a_cnt_blk.addrh = 0x0;
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fadt->x_pm1b_cnt_blk.space_id = 1;
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fadt->x_pm1b_cnt_blk.bit_width = 2;
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fadt->x_pm1b_cnt_blk.bit_offset = 0;
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fadt->x_pm1b_cnt_blk.resv = 0;
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fadt->x_pm1b_cnt_blk.addrl = 0x0;
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fadt->x_pm1b_cnt_blk.addrh = 0x0;
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fadt->x_pm2_cnt_blk.space_id = 1;
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fadt->x_pm2_cnt_blk.bit_width = 0;
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fadt->x_pm2_cnt_blk.bit_offset = 0;
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fadt->x_pm2_cnt_blk.resv = 0;
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fadt->x_pm2_cnt_blk.addrl = 0x0;
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fadt->x_pm2_cnt_blk.addrh = 0x0;
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fadt->x_pm_tmr_blk.space_id = 1;
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fadt->x_pm_tmr_blk.bit_width = 4;
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fadt->x_pm_tmr_blk.bit_offset = 0;
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fadt->x_pm_tmr_blk.resv = 0;
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fadt->x_pm_tmr_blk.addrl = VT8237R_ACPI_IO_BASE + 0x8;
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fadt->x_pm_tmr_blk.addrh = 0x0;
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fadt->x_gpe0_blk.space_id = 1;
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fadt->x_gpe0_blk.bit_width = 0;
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fadt->x_gpe0_blk.bit_offset = 0;
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fadt->x_gpe0_blk.resv = 0;
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fadt->x_gpe0_blk.addrl = VT8237R_ACPI_IO_BASE + 0x20;
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fadt->x_gpe0_blk.addrh = 0x0;
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fadt->x_gpe1_blk.space_id = 1;
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fadt->x_gpe1_blk.bit_width = 0;
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fadt->x_gpe1_blk.bit_offset = 0;
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fadt->x_gpe1_blk.resv = 0;
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fadt->x_gpe1_blk.addrl = 0x0;
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fadt->x_gpe1_blk.addrh = 0x0;
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header->checksum = acpi_checksum((void *) fadt, sizeof(acpi_fadt_t));
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}
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@ -27,7 +27,6 @@ arch i386 end
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driver mainboard.o
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if HAVE_ACPI_TABLES
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object acpi_tables.o
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object fadt.o
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makerule dsdt.c
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depends "$(MAINBOARD)/dsdt.asl"
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action "iasl -p $(CURDIR)/dsdt -tc $(MAINBOARD)/dsdt.asl"
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@ -1,7 +1,7 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
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## Copyright (C) 2007, 2009 Rudolf Marek <r.marek@assembler.cz>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License v2 as published by
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@ -17,6 +17,8 @@
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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uses HAVE_ACPI_TABLES
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config chip.h
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driver vt8237r.o
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@ -24,3 +26,6 @@ driver vt8237_ctrl.o
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driver vt8237r_ide.o
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driver vt8237r_lpc.o
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driver vt8237r_sata.o
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if HAVE_ACPI_TABLES
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object vt8237_fadt.o
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end
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@ -2,7 +2,7 @@
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2004 Nick Barker <nick.barker9@btinternet.com>
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* Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
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* Copyright (C) 2007, 2009 Rudolf Marek <r.marek@assembler.cz>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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@ -21,23 +21,35 @@
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#include <string.h>
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#include <arch/acpi.h>
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#include <../../../southbridge/via/vt8237r/vt8237r.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include "vt8237r.h"
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/**
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* Create the Fixed ACPI Description Tables (FADT) for this board.
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* Create the Fixed ACPI Description Tables (FADT) for any board with this SB.
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*/
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void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
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{
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acpi_header_t *header = &(fadt->header);
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device_t dev;
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int is_vt8237s = 0;
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/* Power management controller */
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dev = dev_find_device(PCI_VENDOR_ID_VIA,
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PCI_DEVICE_ID_VIA_VT8237S_LPC, 0);
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if (dev)
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is_vt8237s = 1;
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memset((void *) fadt, 0, sizeof(acpi_fadt_t));
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memcpy(header->signature, "FACP", 4);
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header->length = 244;
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header->revision = 1;
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header->revision = 4;
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memcpy(header->oem_id, "COREBO", 6);
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memcpy(header->oem_table_id, "COREBOOT", 8);
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memcpy(header->asl_compiler_id, "IASL", 4);
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header->asl_compiler_revision = 0;
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memcpy(header->asl_compiler_id, "CORE", 4);
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header->asl_compiler_revision = 42;
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fadt->firmware_ctrl = facs;
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fadt->dsdt = dsdt;
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@ -53,18 +65,26 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
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fadt->pm1b_evt_blk = 0x0;
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fadt->pm1a_cnt_blk = VT8237R_ACPI_IO_BASE + 0x4;
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fadt->pm1b_cnt_blk = 0x0;
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/* once we support C2/C3 this could be set to 0x22 and chipset needs to be adjusted too */
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fadt->pm2_cnt_blk = 0x0;
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fadt->pm_tmr_blk = VT8237R_ACPI_IO_BASE + 0x8;
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fadt->gpe0_blk = VT8237R_ACPI_IO_BASE + 0x20;
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if (is_vt8237s) {
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fadt->gpe1_blk = VT8237R_ACPI_IO_BASE + 0x60;
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fadt->gpe1_base = 0x10;
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fadt->gpe1_blk_len = 4;
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} else {
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fadt->gpe1_blk = 0x0;
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fadt->gpe1_base = 0;
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fadt->gpe1_blk_len = 0;
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}
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fadt->pm1_evt_len = 4;
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fadt->pm1_cnt_len = 2;
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fadt->pm2_cnt_len = 0;
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fadt->pm_tmr_len = 4;
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fadt->gpe0_blk_len = 4;
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fadt->gpe1_blk_len = 0;
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fadt->gpe1_base = 0;
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fadt->cst_cnt = 0;
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fadt->p_lvl2_lat = 90;
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fadt->p_lvl3_lat = 900;
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@ -77,7 +97,7 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
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fadt->century = 0x32;
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/* We have legacy devices, 8042, VGA is ok to probe, MSI are not supported */
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fadt->iapc_boot_arch = 0xb;
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/* fixme */
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/* check me */
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fadt->flags = 0xa5;
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fadt->reset_reg.space_id = 0;
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@ -94,59 +114,59 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
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fadt->x_dsdt_h = 0;
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fadt->x_pm1a_evt_blk.space_id = 1;
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fadt->x_pm1a_evt_blk.bit_width = 4;
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fadt->x_pm1a_evt_blk.bit_width = fadt->pm1_evt_len * 8;
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fadt->x_pm1a_evt_blk.bit_offset = 0;
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fadt->x_pm1a_evt_blk.resv = 0;
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fadt->x_pm1a_evt_blk.addrl = VT8237R_ACPI_IO_BASE;
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fadt->x_pm1a_evt_blk.addrl = fadt->pm1a_evt_blk;
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fadt->x_pm1a_evt_blk.addrh = 0x0;
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fadt->x_pm1b_evt_blk.space_id = 1;
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fadt->x_pm1b_evt_blk.bit_width = 4;
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fadt->x_pm1b_evt_blk.bit_width = fadt->pm1_evt_len * 8;
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fadt->x_pm1b_evt_blk.bit_offset = 0;
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fadt->x_pm1b_evt_blk.resv = 0;
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fadt->x_pm1b_evt_blk.addrl = 0x0;
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fadt->x_pm1b_evt_blk.addrl = fadt->pm1b_evt_blk;
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fadt->x_pm1b_evt_blk.addrh = 0x0;
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fadt->x_pm1a_cnt_blk.space_id = 1;
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fadt->x_pm1a_cnt_blk.bit_width = 2;
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fadt->x_pm1a_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
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fadt->x_pm1a_cnt_blk.bit_offset = 0;
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fadt->x_pm1a_cnt_blk.resv = 0;
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fadt->x_pm1a_cnt_blk.addrl = VT8237R_ACPI_IO_BASE + 0x4;
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fadt->x_pm1a_cnt_blk.addrl = fadt->pm1a_cnt_blk;
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fadt->x_pm1a_cnt_blk.addrh = 0x0;
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fadt->x_pm1b_cnt_blk.space_id = 1;
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fadt->x_pm1b_cnt_blk.bit_width = 2;
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fadt->x_pm1b_cnt_blk.bit_width = fadt->pm1_cnt_len * 8;
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fadt->x_pm1b_cnt_blk.bit_offset = 0;
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fadt->x_pm1b_cnt_blk.resv = 0;
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fadt->x_pm1b_cnt_blk.addrl = 0x0;
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fadt->x_pm1b_cnt_blk.addrl = fadt->pm1b_cnt_blk;
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fadt->x_pm1b_cnt_blk.addrh = 0x0;
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fadt->x_pm2_cnt_blk.space_id = 1;
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fadt->x_pm2_cnt_blk.bit_width = 0;
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fadt->x_pm2_cnt_blk.bit_width = fadt->pm2_cnt_len * 8;
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fadt->x_pm2_cnt_blk.bit_offset = 0;
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fadt->x_pm2_cnt_blk.resv = 0;
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fadt->x_pm2_cnt_blk.addrl = 0x0;
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fadt->x_pm2_cnt_blk.addrl = fadt->pm2_cnt_blk;
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fadt->x_pm2_cnt_blk.addrh = 0x0;
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fadt->x_pm_tmr_blk.space_id = 1;
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fadt->x_pm_tmr_blk.bit_width = 4;
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fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8;
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fadt->x_pm_tmr_blk.bit_offset = 0;
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fadt->x_pm_tmr_blk.resv = 0;
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fadt->x_pm_tmr_blk.addrl = VT8237R_ACPI_IO_BASE + 0x8;
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fadt->x_pm_tmr_blk.addrl = fadt->pm_tmr_blk;
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fadt->x_pm_tmr_blk.addrh = 0x0;
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fadt->x_gpe0_blk.space_id = 1;
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fadt->x_gpe0_blk.bit_width = 0;
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fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8;
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fadt->x_gpe0_blk.bit_offset = 0;
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||||
fadt->x_gpe0_blk.resv = 0;
|
||||
fadt->x_gpe0_blk.addrl = VT8237R_ACPI_IO_BASE + 0x20;
|
||||
fadt->x_gpe0_blk.addrl = fadt->gpe0_blk;
|
||||
fadt->x_gpe0_blk.addrh = 0x0;
|
||||
|
||||
fadt->x_gpe1_blk.space_id = 1;
|
||||
fadt->x_gpe1_blk.bit_width = 0;
|
||||
fadt->x_gpe1_blk.bit_width = fadt->gpe1_blk_len * 8;;
|
||||
fadt->x_gpe1_blk.bit_offset = 0;
|
||||
fadt->x_gpe1_blk.resv = 0;
|
||||
fadt->x_gpe1_blk.addrl = 0x0;
|
||||
fadt->x_gpe1_blk.addrl = fadt->gpe1_blk;
|
||||
fadt->x_gpe1_blk.addrh = 0x0;
|
||||
|
||||
header->checksum = acpi_checksum((void *) fadt, sizeof(acpi_fadt_t));
|
Loading…
Reference in New Issue