docs/releases/4.20: Update release notes
Change-Id: If5627cef5293c160e91ff85297abe695064f1bd1 Signed-off-by: Felix Singer <felixsinger@posteo.net> Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74981 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Felix Singer
Felix Singer
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Upcoming release - coreboot 4.20
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========================================================================
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The 4.20 release is planned for the 20th of April 2023.
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The 4.20 release is being done on May 15, 2023.
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The coreboot community has done a tremendous amount of work on the
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codebase over the last three and a half month. We've had over 1600
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commits in that time period, doing ongoing cleanup and improvement.
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The 4.21 release is planned for around the 17th of July, 2023
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It can be hard to remember at times how much the codebase really has
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improved, but looking back at coreboot code from previous years, it's
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really impressive the changes that have happened. We'd like to thank
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everyone who has been involved in these changes. It's great to work
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with everyone involved, from the people who make the small cleanup
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patches and review all of the incoming changes to the people working
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on new chipsets and SoCs. We'd additionally like to thank all of those
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individuals who make the effort to become involved and report issues
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or push even a single patch to fix a bug that they've noticed.
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Many thanks to everyone involved!
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Update this document with changes that should be in the release notes.
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* Please use Markdown.
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* See the past few release notes for the general format.
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* The chip and board additions and removals will be updated right
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before the release, so those do not need to be added.
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* Note that all changes before the release are done are marked upcoming.
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A final version of the notes are done after the release.
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* This document may also be edited at the google doc copy:
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https://docs.google.com/document/d/1_0PeRxzT7ep8dIZobzIqG4n6Xwz3kkIDPVQURX7YTmM/edit
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We plan to get the 4.21 release done in mid August, 2023,
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Significant or interesting changes
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----------------------------------
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### Add changes that need a full description here
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### cpu/mp_init.c: Only enable CPUs once they execute code
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* Remove Yabits payload, Yabits project is deprecated and archived.
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On some systems the BSP cannot know how many CPUs are present in the
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system. A typical use case is a multi socket system. Setting the enable
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flag only on CPUs that actually exist makes it more flexible.
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### cpu/x86/smm: Add PCI resource store functionality
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In certain cases data within protected memmory areas like SMRAM could
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be leaked or modified if an attacker remaps PCI BARs to point within
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that area. Add support to the existing SMM runtime to allow storing
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PCI resources in SMRAM and then later retrieving them.
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This helps prevent moving BARs around to get SMM to access memory in
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areas that shouldn't be accessed.
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### acpi: Add SRAT x2APIC table support
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For platforms using X2APIC mode add SRAT x2APIC table
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generation. This allows to setup proper SRAT tables.
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### drivers/usb/acpi: Add USB _DSM method to enable/disable USB LPM per port
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This patch supports projects to use _DSM to control USB3 U1/U2
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transition per port.
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More details can be found in
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https://web.archive.org/web/20230116084819/https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/usb-device-specific-method---dsm-
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The ACPI and USB driver of linux kernel need corresponding functions
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to support this feature. Please see
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https://git.kernel.org/pub/scm/linux/kernel/git/mnyman/xhci.git/log/?h=port_check_acpi_dsm
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### drivers/efi: Add EFI variable store option support
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Add a driver to read and write EFI variables stored in a region device.
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This is particularly useful for EDK2 as payload and allows to reuse
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existing EFI tools to set/get options used by the firmware.
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The write implementation is fault tolerant and doesn't corrupt the
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variable store. A faulting write might result in using the old value
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even though a 'newer' had been completely written.
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Implemented basic unit tests for header corruption, writing existing
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data and append new data into the store.
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Initial firmware region state:
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Initially the variable store region isn't formatted. Usually this is
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done in the EDK2 payload when no valid firmware volume could be found.
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It might be useful to do this offline or in coreboot to have a working
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option store on the first boot or when it was corrupted.
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Performance improvements:
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Right now the code always checks if the firmware volume header is valid.
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This could be optimised by caching the test result in heap. For write
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operations it would be good to cache the end of the variable store in
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the heap as well, instead of walking the whole store. For read
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operations caching the entire store could be considered.
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Reclaiming memory:
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The EFI variable store is append write only. To update an existing
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variable, first a new is written to the end of the store and then the
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previous is marked invalid. This only works on PNOR flash that allow to
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clear set bits, but keep cleared bits state.
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This mechanisms allows a fault tolerant write, but it also requires to
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"clean" the variable store for time to time. This cleaning would remove
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variables that have been marked "deleted".
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Such cleaning mechanism in turn must be fault tolerant and thus must use
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a second partition in the SPI flash as backup/working region.
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For now to cleaning is done in coreboot.
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Fault checking:
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The driver should check if a previous write was successful and if not
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mark variables as deleted on the next operation.
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### drivers/ocp/ewl: Add EWL driver for EWL type 3 error handling
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Add EWL (Enhanced Warning Log) driver which handles Intel EWL HOB
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and prints EWL type 3 primarily associated with MRC training failures.
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### Toolchain updates
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* Upgrade MPC from version 1.2.1 to 1.3.1
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* Upgrade MPFR from version 4.1.1 to 4.2.0
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* Upgrade CMake from version 3.25.0 to 3.26.2
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* Upgrade CMake from version 3.25.0 to 3.26.3
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* Upgrade LLVM from version 15.0.6 to 15.0.7
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* Upgrade GCC from version 11.2.0 to 11.3.0
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* Upgrade binutils from version 2.37 to 2.40
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@ -38,53 +117,110 @@ Significant or interesting changes
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Additional coreboot changes
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---------------------------
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The following are changes across a number of patches, or changes worth
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noting, but not needing a full description.
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* Changes that only need a line or two of description go here.
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* Remove Yabits payload. Yabits is deprecated and archived.
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* Add DDR2 support to Intel GM45 code.
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* Fix superiotool compilation issues when using musl-libc.
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* Drop the Python 2 package from the coreboot-sdk.
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* Drop the Zephyr SDK from coreboot-sdk since the packaged version
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was quite old and wasn’t really used.
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* Add inteltool support for the Intel "Emmitsburg" PCH.
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* Work to improve cache hit percentage when rebuilding using ccache.
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* Adding Sound-Open-Firmware drivers to chromebooks to enable audio on
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non-chrome operating systems.
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* Improve and expand ACPI generation code.
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* Fix some issues for the RISC-V code.
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* Continue upstreaming the POWER9 architecture.
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* Add documentation for SBOM (Software Bill of Materials).
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* Add SimNow console logging support for AMD.
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* Do initial work on Xeon SPR
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* CMOS defaults greater than 128 bytes long now extend to bank 1.
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New Mainboards
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--------------
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* Asrock: B75M-ITX
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* Dell: Latitude E6400
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* Google: Aurash
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* Google: Boxy
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* Google: Constitution
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* Google: Gothrax
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* Google: Hades
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* Google: Myst
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* Google: Screebo
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* Google: Starmie
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* Google: Taranza
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* Google: Uldren
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* Google: Yavilla
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* HP: EliteBook 2170p
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* Intel: Archer City CRB
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* Intel: DQ67SW
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* Protectli: VP2420
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* Protectli: VP4630/VP4650
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* Protectli: VP4670
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* Siemens: MC EHL4
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* Siemens: MC EHL5
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* System76: lemp11
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* System76: oryp10
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* System76: oryp9
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Removed Mainboards
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------------------
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* Intel Icelake U DDR4/LPDDR4 RVP
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* Intel Icelake Y LPDDR4 RVP
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* Scaleway TAGADA
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Updated SoCs
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------------
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* Removed soc/intel/icelake
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Plans to move platform support to a branch
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------------------------------------------
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### Mainboard Scaleway Tagada
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According to the author of the mainboard scaleway/tagada, the mainboard
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is not used anymore. Since the mainboard is not publicly available for
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purchase and not used anywhere else, the usual deprecation process of 6
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months is not needed.
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Thus, to reduce the maintenance overhead for the community, support for
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the following components will be removed from the master branch and will
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be maintained on the release 4.19 branch.
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* Mainboard Scaleway Tagada
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### Intel Quark SoC & Galileo mainboard
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The SoC Intel Quark is unmaintained and different efforts to revive it
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have so far failed. The only user of this SoC ever was the Galileo
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board.
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Thus, to reduce the maintanence overhead for the community, support for
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Thus, to reduce the maintenance overhead for the community, support for
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the following components will be removed from the master branch and will
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be maintained on the release 4.20 branch.
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* Intel Quark SoC
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* Intel Galileo mainboard
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Statistics from the 4.19 to the 4.20 release
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--------------------------------------------
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* To be filled in immediately before the release by the release team
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Total Commits: ~1625
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Average Commits per day: ~13.71
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Total lines added: ~101911
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Average lines added per commit: ~62.71
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Number of patches adding more than 100 lines: ~126
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Average lines added per small commit: ~37.98
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Total lines removed: ~34756
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Average lines removed per commit: ~21.39
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Total difference between added and removed: ~67155
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Total authors: ~170
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New authors: ~35
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Significant Known and Open Issues
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---------------------------------
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* To be filled in immediately before the release by the release team
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Issues from the coreboot bugtracker: https://ticket.coreboot.org/
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| # | Subject |
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|-----|-----------------------------------------------------------------|
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| 478 | X200 booting Linux takes a long time with TSC |
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| 474 | X200s crashes after graphic init with 8GB RAM |
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| 457 | Haswell (t440p): CAR mem region conflicts with CBFS_SIZE > 8mb |
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| 453 | Intel HDMI / DP Audio device not showing up after libgfxinit |
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| 449 | ThinkPad T440p fail to start, continuous beeping & LED blinking |
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| 448 | Thinkpad T440P ACPI Battery Value Issues |
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| 446 | Optiplex 9010 No Post |
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| 439 | Lenovo X201 Turbo Boost not working (stuck on 2,4GHz) |
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| 427 | x200: Two battery charging issues |
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| 414 | X9SAE-V: No USB keyboard init on SeaBIOS using Radeon RX 6800XT |
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| 412 | x230 reboots on suspend |
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| 393 | T500 restarts rather than waking up from suspend |
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| 350 | I225 PCIe device not detected on Harcuvar |
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| 327 | OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) causes BSOD |
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@ -15,6 +15,7 @@ important is taken care of.
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## Previous releases
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* [4.20 - May 2023](coreboot-4.20-relnotes.md)
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* [4.19 - January 2023](coreboot-4.19-relnotes.md)
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* [4.18 - October 2022](coreboot-4.18-relnotes.md)
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* [4.17 - May 2022](coreboot-4.17-relnotes.md)
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