mb/google/skyrim/var/winterhold: Add gpio override settings

Follow FT6_SOC_GPIO_PM&Strap_20220815A.XLSX
update Gpio setting

BUG=b:240824497
BRANCH=None

Signed-off-by: EricKY Cheng <ericky_cheng@compal.corp-partner.google.com>
Change-Id: I2086c326cbf46ba6378d18d37dcbbe9fafa6b2bc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
EricKY Cheng 2022-08-30 19:54:57 +08:00 committed by Raul Rangel
parent fb2bf88a84
commit a53772c5d6
2 changed files with 30 additions and 0 deletions

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@ -1,3 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-or-later
subdirs-y += ./memory
ramstage-y += gpio.c

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/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
#include <soc/gpio.h>
/* GPIO configuration in ramstage */
static const struct soc_amd_gpio override_gpio_table[] = {
/* SOC_PEN_DETECT_ODL */
PAD_NC(GPIO_3),
/* EN_PWR_WWAN_X */
PAD_NC(GPIO_8),
/* SD_AUX_RST_SOC_L */
PAD_NC(GPIO_27),
/* WWAN_RST_L */
PAD_NC(GPIO_42),
};
void variant_override_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
{
*size = ARRAY_SIZE(override_gpio_table);
*gpio = override_gpio_table;
}