From a53dbd4780b2b19b06756f7c119f8c315fca4a58 Mon Sep 17 00:00:00 2001 From: Alex Levin Date: Mon, 9 Mar 2020 16:52:59 -0700 Subject: [PATCH] mb/google/volteer: Disable WWAN PCIe Disable WWAN PCIe to allow WWAN enumerate as USB on Volteer. BUG=b:146226689 BRANCH=none TEST=lsusb shows WWAN device Change-Id: I04e49e3ec989d20ea3469fce06051c475b0ed0c8 Signed-off-by: Nick Vaccaro Reviewed-on: https://review.coreboot.org/c/coreboot/+/39421 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- .../google/volteer/variants/baseboard/devicetree.cb | 8 ++------ src/mainboard/google/volteer/variants/baseboard/gpio.c | 2 +- 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index dd6895b131..b08ff7d5c9 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -56,12 +56,8 @@ chip soc/intel/tigerlake register "PcieClkSrcUsage[1]" = "6" register "PcieClkSrcClkReq[1]" = "1" - # Enable WWAN PCIE 6 using clk 2 - register "PcieRpEnable[5]" = "1" - register "PcieClkSrcUsage[2]" = "5" - register "PcieClkSrcClkReq[2]" = "2" - # Mark SRCCLKREQ pins as unused that are routed for a Non-Clkreq functionality + register "PcieClkSrcUsage[2]" = "0xFF" register "PcieClkSrcUsage[4]" = "0xFF" register "PcieClkSrcUsage[5]" = "0xFF" register "PcieClkSrcUsage[6]" = "0xFF" @@ -309,7 +305,7 @@ chip soc/intel/tigerlake device pci 1c.2 off end # RP3 0xA0BA device pci 1c.3 off end # RP4 0xA0BB device pci 1c.4 off end # RP5 0xA0BC - device pci 1c.5 on end # WWAN RP6 0xA0BD + device pci 1c.5 off end # WWAN RP6 0xA0BD device pci 1c.6 on end # RP7 0xA0BE device pci 1c.7 on end # SD Card RP8 0xA0BF diff --git a/src/mainboard/google/volteer/variants/baseboard/gpio.c b/src/mainboard/google/volteer/variants/baseboard/gpio.c index f6dbed0bee..da3e5423bf 100644 --- a/src/mainboard/google/volteer/variants/baseboard/gpio.c +++ b/src/mainboard/google/volteer/variants/baseboard/gpio.c @@ -170,7 +170,7 @@ static const struct pad_config gpio_table[] = { /* D6 : SRCCLKREQ1# ==> WLAN_CLKREQ_ODL */ PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), /* D7 : SRCCLKREQ2# ==> WWAN_CLKREQ_ODL */ - PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), + PAD_NC(GPP_D7, NONE), /* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */ PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), /* D9 : ISH_SPI_CS# ==> PCH_GSPI2_CVF_CS_L */