trogdor: Add T32 scripts for full boot chain
Change-Id: I4ec1d4f722523f240fa293dd79235ab4e32e4489 Signed-off-by: Ashwin Kumar <ashk@codeaurora.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35505 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
ashk
Julius Werner
parent
c34ebab410
commit
a547584445
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@ -1,16 +0,0 @@
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d.a 0x80000000 mov x0,#0x8c
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d.a 0x80000004 lsl x0, x0, #0x14
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d.a 0x80000008 mov x1,#0x18
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d.a 0x8000000c lsl x1,x1, #0x10
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d.a 0x80000010 mov x2,#0x0
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d.a 0x80000014 mov x3,#0x80
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d.a 0x80000018 lsl x3, x3, #0x18
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d.a 0x8000001c add x3, x3, #0x14
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d.a 0x80000020 str x2,[x0]
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d.a 0x80000024 sub x1, x1, #0x8
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d.a 0x80000028 add x0, x0, #0x8
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d.a 0x8000002c cmp x1,0x0
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d.a 0x80000030 b.ne 0x20
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d.a 0x80000034 b 0x34
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r.s pc 0x80000000
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go
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@ -33,8 +33,6 @@ LOCAL &RAMStage // Ram Stage stop?
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LOCAL &BL31Stage // BL31 Stage stop?
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LOCAL &BL31Stage // BL31 Stage stop?
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LOCAL &DCStage // Depthcharge Stage stop?
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LOCAL &DCStage // Depthcharge Stage stop?
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LOCAL &KernelSyms // Load Kernel Symbols?
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LOCAL &RAMLoad // T32 Load Code?
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LOCAL &RAMLoad // T32 Load Code?
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;============================================================================
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;============================================================================
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@ -45,10 +43,10 @@ LOCAL &RAMLoad // T32 Load Code?
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ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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// Parse for RAMLoad first
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// Parse for RAMLoad first
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if (STR.CP("&ImageName","RAM,*"))
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if (STR.CP("&ImageName","LOAD,*"))
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(
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(
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&RAMLoad=TRUE()
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&RAMLoad=TRUE()
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&ImageName=STR.CUT("&ImageName",4)
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&ImageName=STR.CUT("&ImageName",5)
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)
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)
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else
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else
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&RAMLoad=FALSE()
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&RAMLoad=FALSE()
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@ -63,7 +61,6 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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&RAMStage=TRUE()
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&RAMStage=TRUE()
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;&BL31Stage=TRUE()
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;&BL31Stage=TRUE()
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&DCStage=TRUE()
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&DCStage=TRUE()
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&KernelSyms=STRING.CP("&ImageName", "*KERNEL*")
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)
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)
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else
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else
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(
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(
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@ -72,14 +69,12 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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&ROMStage=STRING.CP("&ImageName","*ROM*")
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&ROMStage=STRING.CP("&ImageName","*ROM*")
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&QCLStage=STRING.CP("&ImageName","*QCL*")
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&QCLStage=STRING.CP("&ImageName","*QCL*")
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&RAMStage=STRING.CP("&ImageName","*RAM*")
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&RAMStage=STRING.CP("&ImageName","*RAM*")
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&BL31Stage=STRING.CP("&ImageName","*BL31*")
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;&BL31Stage=STRING.CP("&ImageName","*BL31*")
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&DCStage=STRING.CP("&ImageName","*DC*")
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&DCStage=STRING.CP("&ImageName","*DC*")
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&KernelSyms=STRING.CP("&ImageName", "*KERNEL*")
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)
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)
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PRINT %String "Debug Script: debug_cb_common.cmm"
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PRINT %String "Debug Script: debug_cb_common.cmm"
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PRINT %String "Images to debug: &ImageName"
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PRINT %String "Images to debug: &ImageName"
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PRINT %String "Loading Kernel Symbols: &KernelSyms"
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PRINT %String "RAMLoad Requested: &RAMLoad"
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PRINT %String "RAMLoad Requested: &RAMLoad"
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PRINT %String "BootBlock Entry Addr: &BBEntryAddr"
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PRINT %String "BootBlock Entry Addr: &BBEntryAddr"
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PRINT %String "VerStage Entry Addr: &VEREntryAddr"
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PRINT %String "VerStage Entry Addr: &VEREntryAddr"
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@ -104,31 +99,17 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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if &BBStage
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if &BBStage
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(
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(
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IF "&debug"==""
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&imgpath="build\cbfs\fallback\bootblock.raw.elf"
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(
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d.load.binary build/coreboot.rom 0xA0000000
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)
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&imgpath="build\cbfs\fallback\bootblock.elf"
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if (&RAMLoad)
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if (&RAMLoad)
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
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else
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else
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
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d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
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;uncomment b.s if not simulating (CONFIG_SOC_SIMULATE)
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d.l
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;b.s run_romstage /o
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;d.set &PreRamConsoleAddr++0x8000 0
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print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
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d.dump &PreRamConsoleAddr /spotlight
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print %String "Press enter to go to next stage"
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IF (STR.CP("&debug","DEBUG"))
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enter
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(
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print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
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print %String "Press enter to go to next stage"
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enter
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)
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ELSE
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(
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go
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enddo
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)
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)
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)
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go &VEREntryAddr
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go &VEREntryAddr
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@ -163,22 +144,29 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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enter
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enter
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)
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)
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;;;; START OF COMMENTED OUT CODE TO SKIP QCLIB DEBUG
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; go &QCLEntryAddr
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; go &QCLEntryAddr
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; wait !run()
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; wait !run()
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;
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; if &QCLStage
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; if &QCLStage
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; (
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; (
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; &imgpath="3rdparty\blobs\soc\qualcomm\sdm845\QcLib.elf"
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; if (&RAMLoad)
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; if (&RAMLoad)
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; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /noclear
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; d.load ...\QcLib.dll
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; else
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; else
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; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode /noclear
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; d.load ...\QcLib.dll
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;
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; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage"
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; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage"
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; print %String "Press enter to go to next stage"
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; print %String "Press enter to go to next stage"
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; enter
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; enter
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; )
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; )
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;;;; END OF QCLIB COMMENTED OUT CODE
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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go &RAMEntryAddr
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go &RAMEntryAddr
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wait !run()
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wait !run()
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@ -194,24 +182,9 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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enter
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enter
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)
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)
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; BL31 disabled for now
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; Next block of code commented out
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;;;;; BL31 DEBUG CODE WOULD BE ADDED HERE
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; go &BL31EntryAddr
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; wait !run()
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;
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; if &BL31Stage
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; (
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; &imgpath="build\bl31.elf"
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; if (&RAMLoad)
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; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath
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; else
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; d.load.elf &imgpath /strippart "coreboot" /sourcepath &srcpath /nocode
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; y.spath.srd 3rdparty/arm-trusted-firmware
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; print %String "Now the control is in BL31, press enter after debugging to go to next stage"
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; print %String "Press enter to go to next stage"
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; enter
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; )
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; End of commented out code block: bl31
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go &DCEntryAddr
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go &DCEntryAddr
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wait !run()
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wait !run()
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@ -220,36 +193,16 @@ ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
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(
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(
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&imgpath="payloads\external\depthcharge\depthcharge\build\depthcharge.elf"
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&imgpath="payloads\external\depthcharge\depthcharge\build\depthcharge.elf"
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symbol.sourcepath.setbasedir &srcpath\payloads
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symbol.sourcepath.setbasedir &srcpath\payloads
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y.spath.srd payloads\external\depthcharge\depthcharge\src
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if (&RAMLoad)
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if (&RAMLoad)
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d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath
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d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath
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else
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else
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d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath /nocode
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d.load.elf &imgpath /strippart "payloads" /sourcepath &srcpath /nocode
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b.d /all
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print %String "Now the control is in depthcharge, end of script"
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b.set main
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d.l
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b.set halt
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;b.s main
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b.set &KernelEntryAddr ; kernel entry point
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;Execute this command in T32 if you start debugging vboot code, e.g. vboot_select_and_load_kernel()
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y.spath.srd + payloads/external/depthcharge/depthcharge
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;y.spath.srd 3rdparty\vboot\firmware
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y.spath.srd + 3rdparty\vboot_reference
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d.dump &RamConsoleAddr /spotlight
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&CBTablePtr=Register(X0)
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Data.SAVE.Binary CBTablePtr.bin &CBTablePtr++0x400
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print %String "Now the control is in Depthcharge, press enter after debugging to run free"
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;print %String "Use this command to load kernel symbols: d.load.elf vmlinux /nocode /strippart kernel"
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print %String "Press enter when done debugging Depthcharge"
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enter
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)
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)
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; go &KernelEntryAddr
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; wait !run()
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;
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; if &KernelSyms
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; (
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; print %String "Kernel Symbols are being loaded, this requires two files in coreboot root tree:"
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; print %String "vmlinux needs to be copied from ChromiumOS build tree"
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; print %String "msm-4.4 needs to be symbolic link to kernel source tree"
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; d.load.elf vmlinux /strippart "msm-4.4" /nocode
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; y.spath.srd msm-4.4
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; print %String "This script now concludes at kernel entry point"
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; )
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enddo
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enddo
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@ -0,0 +1,131 @@
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;============================================================================
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;##
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;## This file is part of the coreboot project.
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;##
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;## Copyright (C) 2019, The Linux Foundation. All rights reserved.
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;##
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;## This program is free software; you can redistribute it and/or modify
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;## it under the terms of the GNU General Public License version 2 and
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;## only version 2 as published by the Free Software Foundation.
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;##
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;## This program is distributed in the hope that it will be useful,
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;## but WITHOUT ANY WARRANTY; without even the implied warranty of
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;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;## GNU General Public License for more details.
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;##
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;============================================================================
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; Name:
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; debug_cb_trogdor.cmm
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;
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; Description:
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; Debug coreboot trogdor front-end
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;============================================================================
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;============================================================================
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; CMM script variables
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;============================================================================
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LOCAL &TargetPkg
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GLOBAL &BBEntryAddr // Bootblock Entry
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GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec
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GLOBAL &VEREntryAddr // Verstage Entry
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GLOBAL &ROMEntryAddr // Romstage Entry
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GLOBAL &QCLEntryAddr // QCLstage Entry
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GLOBAL &RAMEntryAddr // Ramstage Entry
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GLOBAL &BL31EntryAddr // BL31 Entry
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GLOBAL &DCEntryAddr // Depthcharge Entry
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GLOBAL &PreRamConsoleAddr
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GLOBAL &RamConsoleAddr
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GLOBAL &PreRamCbfsCache
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GLOBAL &VBoot2Work
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GLOBAL &Stack
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GLOBAL &Ttb
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GLOBAL &Timestamp
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GLOBAL &CbmemTop
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GLOBAL &PostRamCbfsCache
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GLOBAL &CBTablePtr
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;============================================================================
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;---------------------------------------------------
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; Entry point
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;---------------------------------------------------
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ENTRY &ImageName &RegAddress
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// Later these can be parameterized
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&TargetPkg="trogdorPkg"
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// These settings come from .../src/soc/qualcomm/sc7180/include/soc/memlayout.ld
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&BBEntryAddr=0x14815000
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&VEREntryAddr=0x14680000
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&ROMEntryAddr=0x14680000
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&QCLEntryAddr=0x1486c950
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&RAMEntryAddr=0xA0800000
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&BL31EntryAddr=0x80C00000
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&DCEntryAddr=0xF1000000
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&KernelEntryAddr=0xD0000000
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&PreRamConsoleAddr=0x14830800
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&VBoot2Work=0x1484B000
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&Stack=0x14847000
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&Ttb=0x14839000
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&Timestamp=0x14838800
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&PreRamCbfsCache=0x1481F000
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&CbmemTop=0x280000000
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&PostRamCbfsCache=0x9F800000
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// End of memlayout.ld settings
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// Common commands irrespective of &Mode
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PATH
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&CwDir=os.pwd()
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PATH + &CwDir
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// position at top of coreboot tree
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// find depth count for source loading
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cd ..\..\..\..
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&srcpath=os.pwd()
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;---------------------------------------------------
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; Setup area and log
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;---------------------------------------------------
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area.clear
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area.reset
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area.create CB_Logs 1000. 8192.
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area.select CB_Logs
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area.view CB_Logs
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PRINT %String "Source Path: &srcpath"
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symbol.sourcepath.setbasedir &srcpath\src
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// Make parsing simple, upper-case parameters
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&ImageName=STRING.UPR("&ImageName")
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if (STR.CP("&ImageName","0X*"))
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(
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&RegAddress=&ImageName
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&ImageName=""
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)
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&RegAddress=STRING.UPR("&RegAddress")
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PRINT %String "ImageName: &ImageName"
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PRINT %String "RegAddress: &RegAddress"
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sys.d
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sys.up
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b.d
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y.reset
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if (STR.CP("&RegAddress","0X*"))
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D.S EZAXI:&RegAddress %LE %Long 0x80000000
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go &BBEntryAddr
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wait !run()
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DO debug_cb_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName
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enddo
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@ -0,0 +1,210 @@
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;============================================================================
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||||||
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;##
|
||||||
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;## This file is part of the coreboot project.
|
||||||
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;##
|
||||||
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;## Copyright (C) 2018, The Linux Foundation. All rights reserved.
|
||||||
|
;##
|
||||||
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;## This program is free software; you can redistribute it and/or modify
|
||||||
|
;## it under the terms of the GNU General Public License version 2 and
|
||||||
|
;## only version 2 as published by the Free Software Foundation.
|
||||||
|
;##
|
||||||
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;## This program is distributed in the hope that it will be useful,
|
||||||
|
;## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
;## GNU General Public License for more details.
|
||||||
|
;##
|
||||||
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;============================================================================
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||||||
|
; Name:
|
||||||
|
; debug_chroot_common.cmm
|
||||||
|
;
|
||||||
|
; Description:
|
||||||
|
; Debug chroot coreboot Environment
|
||||||
|
;============================================================================
|
||||||
|
|
||||||
|
;============================================================================
|
||||||
|
; CMM script variables
|
||||||
|
;============================================================================
|
||||||
|
|
||||||
|
LOCAL &BBStage // Bootblock Stage stop?
|
||||||
|
LOCAL &VERStage // Verify Stage stop?
|
||||||
|
LOCAL &ROMStage // Rom Stage stop?
|
||||||
|
LOCAL &QCLStage // QCL Stage stop?
|
||||||
|
LOCAL &RAMStage // Ram Stage stop?
|
||||||
|
LOCAL &BL31Stage // BL31 Stage stop?
|
||||||
|
LOCAL &DCStage // Depthcharge Stage stop?
|
||||||
|
|
||||||
|
LOCAL &RAMLoad // T32 Load Code?
|
||||||
|
|
||||||
|
;============================================================================
|
||||||
|
|
||||||
|
;---------------------------------------------------
|
||||||
|
; Entry point
|
||||||
|
;---------------------------------------------------
|
||||||
|
ENTRY &TargetPkg &srcpath &xblsrcpath &ImageName
|
||||||
|
|
||||||
|
// Parse for RAMLoad first
|
||||||
|
if (STR.CP("&ImageName","LOAD,*"))
|
||||||
|
(
|
||||||
|
&RAMLoad=TRUE()
|
||||||
|
&ImageName=STR.CUT("&ImageName",5)
|
||||||
|
)
|
||||||
|
else
|
||||||
|
&RAMLoad=FALSE()
|
||||||
|
|
||||||
|
// Parse &ImageName the easy way
|
||||||
|
if (STR.CP("&ImageName","*ALL*"))
|
||||||
|
(
|
||||||
|
&BBStage=TRUE()
|
||||||
|
&VERStage=TRUE()
|
||||||
|
&ROMStage=TRUE()
|
||||||
|
&QCLStage=TRUE()
|
||||||
|
&RAMStage=TRUE()
|
||||||
|
;&BL31Stage=TRUE()
|
||||||
|
&DCStage=TRUE()
|
||||||
|
)
|
||||||
|
else
|
||||||
|
(
|
||||||
|
&BBStage=STRING.CP("&ImageName","*BB*")
|
||||||
|
&VERStage=STRING.CP("&ImageName","*VER*")
|
||||||
|
&ROMStage=STRING.CP("&ImageName","*ROM*")
|
||||||
|
&QCLStage=STRING.CP("&ImageName","*QCL*")
|
||||||
|
&RAMStage=STRING.CP("&ImageName","*RAM*")
|
||||||
|
;&BL31Stage=STRING.CP("&ImageName","*BL31*")
|
||||||
|
&DCStage=STRING.CP("&ImageName","*DC*")
|
||||||
|
)
|
||||||
|
|
||||||
|
PRINT %String "Debug Script: debug_chroot_common.cmm"
|
||||||
|
PRINT %String "Images to debug: &ImageName"
|
||||||
|
PRINT %String "RAMLoad Requested: &RAMLoad"
|
||||||
|
PRINT %String "BootBlock Entry Addr: &BBEntryAddr"
|
||||||
|
PRINT %String "VerStage Entry Addr: &VEREntryAddr"
|
||||||
|
PRINT %String "RomStage Entry Addr: &ROMEntryAddr"
|
||||||
|
PRINT %String "QCLStage Entry Addr: &QCLEntryAddr"
|
||||||
|
PRINT %String "RamStage Entry Addr: &RAMEntryAddr"
|
||||||
|
PRINT %String "BL31 Entry Addr: &BL31EntryAddr"
|
||||||
|
PRINT %String "DepthCharge Entry Addr: &DCEntryAddr"
|
||||||
|
PRINT %String "Kernel Entry Addr: &KernelEntryAddr"
|
||||||
|
PRINT %String "PreRamCbfsCache: &PreRamCbfsCache"
|
||||||
|
PRINT %String "PreRamConsoleAddr: &PreRamConsoleAddr"
|
||||||
|
PRINT %String "VBoot2Work: &VBoot2Work"
|
||||||
|
PRINT %String "Stack: &Stack"
|
||||||
|
PRINT %String "Ttb: &Ttb"
|
||||||
|
PRINT %String "Timestamp &Timestamp"
|
||||||
|
PRINT %String "RamConsoleAddr &RamConsoleAddr"
|
||||||
|
PRINT %String "CbmemTop &CbmemTop"
|
||||||
|
PRINT %String "PostRamCbfsCache &PostRamCbfsCache"
|
||||||
|
|
||||||
|
// HW at BB entry, first stop: bootblock
|
||||||
|
////////////////////////////////////////
|
||||||
|
|
||||||
|
if &BBStage
|
||||||
|
(
|
||||||
|
&imgpath="build-trogdor\cbfs\fallback\bootblock.raw.elf"
|
||||||
|
if (&RAMLoad)
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath
|
||||||
|
else
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode
|
||||||
|
|
||||||
|
d.l
|
||||||
|
|
||||||
|
print %String "Now the control is in BootBlock, press enter after debugging to go to next stage"
|
||||||
|
print %String "Press enter to go to next stage"
|
||||||
|
enter
|
||||||
|
)
|
||||||
|
|
||||||
|
go &VEREntryAddr
|
||||||
|
wait !run()
|
||||||
|
|
||||||
|
if &VERStage
|
||||||
|
(
|
||||||
|
&imgpath="build-trogdor\cbfs\fallback\verstage.elf"
|
||||||
|
if (&RAMLoad)
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /noclear
|
||||||
|
else
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode /noclear
|
||||||
|
|
||||||
|
print %String "Now the control is in VERStage, press enter after debugging to go to next stage"
|
||||||
|
print %String "Press enter to go to next stage"
|
||||||
|
enter
|
||||||
|
)
|
||||||
|
|
||||||
|
go &ROMEntryAddr
|
||||||
|
wait !run()
|
||||||
|
|
||||||
|
if &ROMStage
|
||||||
|
(
|
||||||
|
&imgpath="build-trogdor\cbfs\fallback\romstage.elf"
|
||||||
|
if (&RAMLoad)
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath
|
||||||
|
else
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode
|
||||||
|
|
||||||
|
print %String "Now the control is in ROMStage, press enter after debugging to go to next stage"
|
||||||
|
print %String "Press enter to go to next stage"
|
||||||
|
enter
|
||||||
|
)
|
||||||
|
|
||||||
|
;;;; START OF COMMENTED OUT CODE TO SKIP QCLIB DEBUG
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
|
||||||
|
; go &QCLEntryAddr
|
||||||
|
; wait !run()
|
||||||
|
|
||||||
|
; if &QCLStage
|
||||||
|
; (
|
||||||
|
|
||||||
|
; if (&RAMLoad)
|
||||||
|
; d.load ...\QcLib.dll
|
||||||
|
; else
|
||||||
|
; d.load ...\QcLib.dll
|
||||||
|
|
||||||
|
|
||||||
|
; print %String "Now the control is in QCLStage, press enter after debugging to go to next stage"
|
||||||
|
; print %String "Press enter to go to next stage"
|
||||||
|
; enter
|
||||||
|
; )
|
||||||
|
|
||||||
|
;;;; END OF QCLIB COMMENTED OUT CODE
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
|
||||||
|
go &RAMEntryAddr
|
||||||
|
wait !run()
|
||||||
|
|
||||||
|
if &RAMStage
|
||||||
|
(
|
||||||
|
&imgpath="build-trogdor\cbfs\fallback\ramstage.elf"
|
||||||
|
if (&RAMLoad)
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath
|
||||||
|
else
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode
|
||||||
|
|
||||||
|
print %String "Now the control is in RAMStage, press enter after debugging to go to next stage"
|
||||||
|
print %String "Press enter to go to next stage"
|
||||||
|
enter
|
||||||
|
)
|
||||||
|
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
;;;;; BL31 DEBUG CODE WOULD BE ADDED HERE
|
||||||
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
|
|
||||||
|
go &DCEntryAddr
|
||||||
|
wait !run()
|
||||||
|
|
||||||
|
if &DCStage
|
||||||
|
(
|
||||||
|
&srcpath="..\..\..\depthcharge-9999\work\depthcharge-9999\src"
|
||||||
|
&imgpath="..\..\..\depthcharge-9999\work\depthcharge-9999\trogdor\depthcharge.elf"
|
||||||
|
symbol.sourcepath.setbasedir &srcpath
|
||||||
|
if (&RAMLoad)
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath
|
||||||
|
else
|
||||||
|
d.load.elf &imgpath /strippart 9 /sourcepath &srcpath /nocode
|
||||||
|
|
||||||
|
print %String "Now the control is in depthcharge, end of script"
|
||||||
|
d.l
|
||||||
|
;b.s main
|
||||||
|
;Execute this command in T32 if you start debugging vboot code, e.g. vboot_select_and_load_kernel()
|
||||||
|
;y.spath.sbd 3rdparty\vboot\firmware
|
||||||
|
)
|
||||||
|
|
||||||
|
enddo
|
||||||
|
|
@ -0,0 +1,131 @@
|
||||||
|
;============================================================================
|
||||||
|
;##
|
||||||
|
;## This file is part of the coreboot project.
|
||||||
|
;##
|
||||||
|
;## Copyright (C) 2019, The Linux Foundation. All rights reserved.
|
||||||
|
;##
|
||||||
|
;## This program is free software; you can redistribute it and/or modify
|
||||||
|
;## it under the terms of the GNU General Public License version 2 and
|
||||||
|
;## only version 2 as published by the Free Software Foundation.
|
||||||
|
;##
|
||||||
|
;## This program is distributed in the hope that it will be useful,
|
||||||
|
;## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
;## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
;## GNU General Public License for more details.
|
||||||
|
;##
|
||||||
|
;============================================================================
|
||||||
|
; Name:
|
||||||
|
; debug_chroot_trogdor.cmm
|
||||||
|
;
|
||||||
|
; Description:
|
||||||
|
; Debug coreboot trogdor front-end (in chroot environment)
|
||||||
|
;============================================================================
|
||||||
|
|
||||||
|
;============================================================================
|
||||||
|
; CMM script variables
|
||||||
|
;============================================================================
|
||||||
|
|
||||||
|
LOCAL &TargetPkg
|
||||||
|
|
||||||
|
GLOBAL &BBEntryAddr // Bootblock Entry
|
||||||
|
GLOBAL &BBExitAddr // Bootblock Exit to Xbl-Sec
|
||||||
|
GLOBAL &VEREntryAddr // Verstage Entry
|
||||||
|
GLOBAL &ROMEntryAddr // Romstage Entry
|
||||||
|
GLOBAL &QCLEntryAddr // QCLstage Entry
|
||||||
|
GLOBAL &RAMEntryAddr // Ramstage Entry
|
||||||
|
GLOBAL &BL31EntryAddr // BL31 Entry
|
||||||
|
GLOBAL &DCEntryAddr // Depthcharge Entry
|
||||||
|
|
||||||
|
GLOBAL &PreRamConsoleAddr
|
||||||
|
GLOBAL &RamConsoleAddr
|
||||||
|
GLOBAL &PreRamCbfsCache
|
||||||
|
GLOBAL &VBoot2Work
|
||||||
|
GLOBAL &Stack
|
||||||
|
GLOBAL &Ttb
|
||||||
|
GLOBAL &Timestamp
|
||||||
|
GLOBAL &CbmemTop
|
||||||
|
GLOBAL &PostRamCbfsCache
|
||||||
|
|
||||||
|
GLOBAL &CBTablePtr
|
||||||
|
|
||||||
|
;============================================================================
|
||||||
|
|
||||||
|
;---------------------------------------------------
|
||||||
|
; Entry point
|
||||||
|
;---------------------------------------------------
|
||||||
|
ENTRY &ImageName &RegAddress
|
||||||
|
|
||||||
|
// Later these can be parameterized
|
||||||
|
&TargetPkg="trogdorPkg"
|
||||||
|
|
||||||
|
// These settings come from .../src/soc/qualcomm/sc7180/include/soc/memlayout.ld
|
||||||
|
&BBEntryAddr=0x14815000
|
||||||
|
&VEREntryAddr=0x14680000
|
||||||
|
&ROMEntryAddr=0x14680000
|
||||||
|
&QCLEntryAddr=0x1486c950
|
||||||
|
&RAMEntryAddr=0xA0800000
|
||||||
|
&BL31EntryAddr=0x80C00000
|
||||||
|
&DCEntryAddr=0xF1000000
|
||||||
|
&KernelEntryAddr=0xD0000000
|
||||||
|
|
||||||
|
&PreRamConsoleAddr=0x14830800
|
||||||
|
&VBoot2Work=0x1484B000
|
||||||
|
&Stack=0x14847000
|
||||||
|
&Ttb=0x14839000
|
||||||
|
&Timestamp=0x14838800
|
||||||
|
&PreRamCbfsCache=0x1481F000
|
||||||
|
&CbmemTop=0x280000000
|
||||||
|
&PostRamCbfsCache=0x9F800000
|
||||||
|
// End of memlayout.ld settings
|
||||||
|
|
||||||
|
// Common commands irrespective of &Mode
|
||||||
|
PATH
|
||||||
|
&CwDir=os.pwd()
|
||||||
|
PATH + &CwDir
|
||||||
|
|
||||||
|
// position at top of coreboot tree
|
||||||
|
// find depth count for source loading
|
||||||
|
cd ..\..\..\..\..\..\..\chroot\build\trogdor\tmp\portage\sys-boot\coreboot-9999\work\coreboot-9999
|
||||||
|
&srcpath=os.pwd()
|
||||||
|
|
||||||
|
|
||||||
|
;---------------------------------------------------
|
||||||
|
; Setup area and log
|
||||||
|
;---------------------------------------------------
|
||||||
|
area.clear
|
||||||
|
area.reset
|
||||||
|
area.create CB_Logs 1000. 8192.
|
||||||
|
area.select CB_Logs
|
||||||
|
|
||||||
|
area.view CB_Logs
|
||||||
|
|
||||||
|
PRINT %String "Source Path: &srcpath"
|
||||||
|
|
||||||
|
symbol.sourcepath.setbasedir &srcpath\src
|
||||||
|
|
||||||
|
// Make parsing simple, upper-case parameters
|
||||||
|
&ImageName=STRING.UPR("&ImageName")
|
||||||
|
if (STR.CP("&ImageName","0X*"))
|
||||||
|
(
|
||||||
|
&RegAddress=&ImageName
|
||||||
|
&ImageName=""
|
||||||
|
)
|
||||||
|
&RegAddress=STRING.UPR("&RegAddress")
|
||||||
|
|
||||||
|
PRINT %String "ImageName: &ImageName"
|
||||||
|
PRINT %String "RegAddress: &RegAddress"
|
||||||
|
|
||||||
|
sys.d
|
||||||
|
sys.up
|
||||||
|
b.d
|
||||||
|
y.reset
|
||||||
|
|
||||||
|
if (STR.CP("&RegAddress","0X*"))
|
||||||
|
D.S EZAXI:&RegAddress %LE %Long 0x80000000
|
||||||
|
|
||||||
|
go &BBEntryAddr
|
||||||
|
wait !run()
|
||||||
|
|
||||||
|
DO debug_chroot_common.cmm &TargetPkg &srcpath &xblsrcpath &ImageName
|
||||||
|
|
||||||
|
enddo
|
||||||
|
|
@ -1,15 +0,0 @@
|
||||||
PER.Set.simple SPR:0x36100 %Long 00c5183C
|
|
||||||
D.S AZSD:0x8600034 %LE %Long 0x8600000
|
|
||||||
D.S AZSD:0x8600000 %LE %Long 0x1400000
|
|
||||||
d.a 0x8600004 ldr r0,0x8600034
|
|
||||||
d.a 0x8600008 mcr p15,0x0,r0,c12,c0,1
|
|
||||||
d.a 0x860000c dsb
|
|
||||||
d.a 0x8600010 isb
|
|
||||||
d.a 0x8600014 mrc p15,0x0,r1,c12,c0,2
|
|
||||||
d.a 0x8600018 orr r1,r1,0x3
|
|
||||||
d.a 0x860001c mcr p15,0x0,r1,c12,c0,2
|
|
||||||
d.a 0x8600020 isb
|
|
||||||
d.a 0x8600024 wfi
|
|
||||||
r.s pc 0x8600004
|
|
||||||
go
|
|
||||||
b
|
|
||||||
Loading…
Reference in New Issue