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sb/intel/bd82x6x: assign PCH HDA controller ops in chipset devicetree 

Since the HD audio controller in the PCH are always on the same device
functions, the device operations can be statically assigned in the
devicetree and there's no need to bind the host bridge device operations
to the PCI device during runtime via a list of PCI IDs.

TEST=Lenovo X220 still boots to Linux and audio still works

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Change-Id: I9bbbe9f4490dc6fb21174d63d1c8906d69ea3ee0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79118
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2023-11-16 14:20:40 +01:00
parent 58a5374d5f
commit a56ff9087b
2 changed files with 2 additions and 10 deletions
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2
src/northbridge/intel/sandybridge/chipset.cb
View File

@ -26,7 +26,7 @@ chip northbridge/intel/sandybridge
device pci 16.3 alias me_kt off end # Management Engine KT device pci 16.3 alias me_kt off end # Management Engine KT
device pci 19.0 alias gbe off end # Intel Gigabit Ethernet device pci 19.0 alias gbe off end # Intel Gigabit Ethernet
device pci 1a.0 alias ehci2 off end # USB2 EHCI #2 device pci 1a.0 alias ehci2 off end # USB2 EHCI #2
device pci 1b.0 alias hda off end # High Definition Audio device pci 1b.0 alias hda off ops bd82x6x_azalia_ops end # High Definition Audio
device pci 1c.0 alias pcie_rp1 off ops bd82x6x_pcie_rp_ops end # PCIe Port #1 device pci 1c.0 alias pcie_rp1 off ops bd82x6x_pcie_rp_ops end # PCIe Port #1
device pci 1c.1 alias pcie_rp2 off ops bd82x6x_pcie_rp_ops end # PCIe Port #2 device pci 1c.1 alias pcie_rp2 off ops bd82x6x_pcie_rp_ops end # PCIe Port #2
device pci 1c.2 alias pcie_rp3 off ops bd82x6x_pcie_rp_ops end # PCIe Port #3 device pci 1c.2 alias pcie_rp3 off ops bd82x6x_pcie_rp_ops end # PCIe Port #3

10
src/southbridge/intel/bd82x6x/azalia.c
View File

@ -122,7 +122,7 @@ static const char *azalia_acpi_name(const struct device *dev)
return "HDEF"; return "HDEF";
} }
static struct device_operations azalia_ops = { struct device_operations bd82x6x_azalia_ops = {
.read_resources = pci_dev_read_resources, .read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources, .set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources, .enable_resources = pci_dev_enable_resources,
@ -130,11 +130,3 @@ static struct device_operations azalia_ops = {
.ops_pci = &pci_dev_ops_pci, .ops_pci = &pci_dev_ops_pci,
.acpi_name = azalia_acpi_name, .acpi_name = azalia_acpi_name,
}; };
static const unsigned short pci_device_ids[] = { 0x1c20, 0x1e20, 0 };
static const struct pci_driver pch_azalia __pci_driver = {
.ops = &azalia_ops,
.vendor = PCI_VID_INTEL,
.devices = pci_device_ids,
};