Drop SuperIO ite/it8661f
All boards using this SuperIO have been removed from the tree already. Change-Id: Ifca91ae44ab222371808ff1e0027a7cbd4646b0a Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12243 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -23,10 +23,6 @@
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config SUPERIO_ITE_COMMON_ROMSTAGE
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bool
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config SUPERIO_ITE_IT8661F
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bool
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select SUPERIO_ITE_COMMON_ROMSTAGE
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config SUPERIO_ITE_IT8671F
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bool
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select SUPERIO_ITE_COMMON_ROMSTAGE
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@ -20,7 +20,6 @@
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## include generic ite pre-ram stage driver
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romstage-$(CONFIG_SUPERIO_ITE_COMMON_ROMSTAGE) += common/early_serial.c
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subdirs-y += it8661f
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subdirs-y += it8671f
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subdirs-y += it8712f
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subdirs-y += it8716f
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@ -1,22 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc.
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##
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romstage-$(CONFIG_SUPERIO_ITE_IT8661F) += early_serial.c
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ramstage-$(CONFIG_SUPERIO_ITE_IT8661F) += superio.c
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@ -1,80 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <arch/io.h>
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#include <device/pnp.h>
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#include "it8661f.h"
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/* Perform MB PnP setup to put the SIO chip at 0x3f0. */
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/* Base address 0x3f0: 0x86 0x80 0x55 0x55. */
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/* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */
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/* Base address 0x370: 0x86 0x80 0xaa 0x55. */
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static void pnp_enter_ext_func_mode(pnp_devfn_t dev)
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{
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int i;
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u16 port = dev >> 8;
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/* TODO: Don't hardcode Super I/O config port to 0x3f0. */
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outb(0x86, IT8661F_ISA_PNP_PORT);
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outb(0x80, IT8661F_ISA_PNP_PORT);
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outb(0x55, IT8661F_ISA_PNP_PORT);
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outb(0x55, IT8661F_ISA_PNP_PORT);
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/* Sequentially write the 32 special values. */
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for (i = 0; i < 32; i++)
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outb(init_values[i], port);
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}
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static void pnp_exit_ext_func_mode(pnp_devfn_t dev)
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{
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pnp_write_config(dev, IT8661F_REG_CC, (1 << 1));
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}
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/*
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* The logical devices will only be involved in the ISA PnP sequence if their
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* respective enable bits in IT8661F_REG_LDE are set.
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*
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* TODO: Find out if we actually need this (we use MB PnP mode).
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*
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* Bits: FDC (0), Com1 (1), Com2 (2), PP (3), IR (4). Bits 5-7 are reserved.
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*/
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static void it8661f_enable_logical_devices(pnp_devfn_t dev)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_write_config(dev, IT8661F_REG_LDE, 0x1f);
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pnp_exit_ext_func_mode(dev);
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}
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static void it8661f_set_clkin(pnp_devfn_t dev, u8 clkin)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_write_config(dev, IT8661F_REG_SWSUSP, (clkin << 1));
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pnp_exit_ext_func_mode(dev);
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}
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void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase)
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{
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pnp_enter_ext_func_mode(dev);
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pnp_set_logical_device(dev);
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pnp_set_enable(dev, 0);
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pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
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pnp_set_enable(dev, 1);
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pnp_exit_ext_func_mode(dev);
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}
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@ -1,57 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#ifndef SUPERIO_ITE_IT8661F_H
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#define SUPERIO_ITE_IT8661F_H
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/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8661_2.asp */
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/* Logical device numbers (LDNs). */
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#define IT8661F_FDC 0x00 /* Floppy */
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#define IT8661F_SP1 0x01 /* Com1 */
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#define IT8661F_SP2 0x02 /* Com2 */
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#define IT8661F_PP 0x03 /* Parallel port */
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#define IT8661F_IR 0x04 /* IR */
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#define IT8661F_GPIO 0x05 /* GPIO & Alternate Function Configuration */
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/* Register and bit definitions. */
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#define IT8661F_REG_CC 0x02 /* Configure Control (write-only). */
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#define IT8661F_REG_LDE 0x23 /* PnP Logical Device Enable. */
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#define IT8661F_REG_SWSUSP 0x24 /* Software Suspend + Clock Select. */
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#define IT8661F_ISA_PNP_PORT 0x0279 /* Write-only. */
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#define IT8661F_CLKIN_24_MHZ 0
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#define IT8661F_CLKIN_48_MHZ 1
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/*
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* Special values used for entering MB PnP mode. The first four bytes of
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* each line determine the address port, the last four are data.
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*/
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static const u8 init_values[] = {
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0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe,
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0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61,
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0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1,
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0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39,
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};
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void it8661f_enable_serial(pnp_devfn_t dev, u16 iobase);
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#endif /* SUPERIO_ITE_IT8661F_H */
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@ -1,66 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <device/device.h>
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#include <device/pnp.h>
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#include <stdlib.h>
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#include "it8661f.h"
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/* TODO: Add pnp_enter_ext_func_mode() etc. and wrap functions. */
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static void init(struct device *dev)
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{
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if (!dev->enabled)
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return;
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switch (dev->path.pnp.device) {
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case IT8661F_FDC: /* TODO. */
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break;
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case IT8661F_PP: /* TODO. */
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break;
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case IT8661F_IR: /* TODO. */
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break;
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}
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}
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static struct device_operations ops = {
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.read_resources = pnp_read_resources,
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.set_resources = pnp_set_resources,
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.enable_resources = pnp_enable_resources,
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.enable = pnp_enable,
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.init = init,
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};
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/* TODO: FDC, PP, IR, GPIO. */
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static struct pnp_info pnp_dev_info[] = {
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{ &ops, IT8661F_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
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{ &ops, IT8661F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, {0x07f8, 0}, },
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};
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static void enable_dev(struct device *dev)
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{
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pnp_enable_devices(dev, &pnp_ops,
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ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
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}
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struct chip_operations superio_ite_it8661f_ops = {
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CHIP_NAME("ITE IT8661F Super I/O")
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.enable_dev = enable_dev,
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};
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