diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c index b33fb69e89..b40b4bc8e0 100644 --- a/src/mainboard/google/kahlee/mainboard.c +++ b/src/mainboard/google/kahlee/mainboard.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c index 6d930d0e7a..5ab90cf768 100644 --- a/src/mainboard/google/zork/mainboard.c +++ b/src/mainboard/google/zork/mainboard.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c index 91773d9966..a5f0eaf0b2 100644 --- a/src/soc/amd/common/block/gpio_banks/gpio.c +++ b/src/soc/amd/common/block/gpio_banks/gpio.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include diff --git a/src/soc/amd/common/block/include/amdblocks/smi.h b/src/soc/amd/common/block/include/amdblocks/smi.h new file mode 100644 index 0000000000..31f9042ea8 --- /dev/null +++ b/src/soc/amd/common/block/include/amdblocks/smi.h @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_BLOCK_SMI_H +#define AMD_BLOCK_SMI_H + +#include + +enum smi_mode { + SMI_MODE_DISABLE = 0, + SMI_MODE_SMI = 1, + SMI_MODE_NMI = 2, + SMI_MODE_IRQ13 = 3, +}; + +enum smi_sci_type { + INTERRUPT_NONE, + INTERRUPT_SCI, + INTERRUPT_SMI, + INTERRUPT_BOTH, +}; + +enum smi_sci_lvl { + SMI_SCI_LVL_LOW, + SMI_SCI_LVL_HIGH, +}; + +enum smi_sci_dir { + SMI_SCI_EDG, + SMI_SCI_LVL, +}; + +struct smi_sources_t { + int type; + void (*handler)(void); +}; + +struct sci_source { + uint8_t scimap; /* SCI source number */ + uint8_t gpe; /* 32 GPEs */ + uint8_t direction; /* Active High or Low, smi_sci_lvl */ + uint8_t level; /* Edge or Level, smi_sci_dir */ +}; + +void configure_smi(uint8_t smi_num, uint8_t mode); +void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); +void configure_scimap(const struct sci_source *sci); +void disable_gevent_smi(uint8_t gevent); +void gpe_configure_sci(const struct sci_source *scis, size_t num_gpes); +void soc_route_sci(uint8_t event); + +#endif /* AMD_BLOCK_SMI_H */ diff --git a/src/soc/amd/picasso/gpio.c b/src/soc/amd/picasso/gpio.c index c402fb5a6e..3ad4c5cc94 100644 --- a/src/soc/amd/picasso/gpio.c +++ b/src/soc/amd/picasso/gpio.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include diff --git a/src/soc/amd/picasso/include/soc/smi.h b/src/soc/amd/picasso/include/soc/smi.h index 1f08efe3ac..ad7edbcc7d 100644 --- a/src/soc/amd/picasso/include/soc/smi.h +++ b/src/soc/amd/picasso/include/soc/smi.h @@ -178,47 +178,4 @@ #define SMI_MODE_MASK 0x03 -enum smi_mode { - SMI_MODE_DISABLE = 0, - SMI_MODE_SMI = 1, - SMI_MODE_NMI = 2, - SMI_MODE_IRQ13 = 3, -}; - -enum smi_sci_type { - INTERRUPT_NONE, - INTERRUPT_SCI, - INTERRUPT_SMI, - INTERRUPT_BOTH, -}; - -enum smi_sci_lvl { - SMI_SCI_LVL_LOW, - SMI_SCI_LVL_HIGH, -}; - -enum smi_sci_dir { - SMI_SCI_EDG, - SMI_SCI_LVL, -}; - -struct smi_sources_t { - int type; - void (*handler)(void); -}; - -struct sci_source { - uint8_t scimap; /* SCIMAP 0-57 */ - uint8_t gpe; /* 32 GPEs */ - uint8_t direction; /* Active High or Low, smi_sci_lvl */ - uint8_t level; /* Edge or Level, smi_sci_dir */ -}; - -void configure_smi(uint8_t smi_num, uint8_t mode); -void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); -void configure_scimap(const struct sci_source *sci); -void disable_gevent_smi(uint8_t gevent); -void gpe_configure_sci(const struct sci_source *scis, size_t num_gpes); -void soc_route_sci(uint8_t event); - #endif /* AMD_PICASSO_SMI_H */ diff --git a/src/soc/amd/picasso/psp.c b/src/soc/amd/picasso/psp.c index 702b0d9d96..6a4a1ea821 100644 --- a/src/soc/amd/picasso/psp.c +++ b/src/soc/amd/picasso/psp.c @@ -5,6 +5,7 @@ #include #include #include +#include #define PSP_MAILBOX_OFFSET 0x10570 #define MSR_CU_CBBCFG 0xc00110a2 diff --git a/src/soc/amd/picasso/smi_util.c b/src/soc/amd/picasso/smi_util.c index 2fbc8e2d6a..39b2b95a2c 100644 --- a/src/soc/amd/picasso/smi_util.c +++ b/src/soc/amd/picasso/smi_util.c @@ -9,6 +9,7 @@ #include #include #include +#include void configure_smi(uint8_t smi_num, uint8_t mode) { diff --git a/src/soc/amd/picasso/smihandler.c b/src/soc/amd/picasso/smihandler.c index 7e762a9abb..4931de82b7 100644 --- a/src/soc/amd/picasso/smihandler.c +++ b/src/soc/amd/picasso/smihandler.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c index f3424497c4..bc801a34b4 100644 --- a/src/soc/amd/picasso/southbridge.c +++ b/src/soc/amd/picasso/southbridge.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include diff --git a/src/soc/amd/picasso/xhci.c b/src/soc/amd/picasso/xhci.c index 97a012e03f..a7e480767e 100644 --- a/src/soc/amd/picasso/xhci.c +++ b/src/soc/amd/picasso/xhci.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include #include #include diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c index a595014813..f1ed202f80 100644 --- a/src/soc/amd/stoneyridge/gpio.c +++ b/src/soc/amd/stoneyridge/gpio.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h index 60a91d087a..61624755c5 100644 --- a/src/soc/amd/stoneyridge/include/soc/smi.h +++ b/src/soc/amd/stoneyridge/include/soc/smi.h @@ -175,47 +175,4 @@ #define SMI_REG_CONTROL8 0xc0 #define SMI_REG_CONTROL9 0xc4 -enum smi_mode { - SMI_MODE_DISABLE = 0, - SMI_MODE_SMI = 1, - SMI_MODE_NMI = 2, - SMI_MODE_IRQ13 = 3, -}; - -enum smi_sci_type { - INTERRUPT_NONE, - INTERRUPT_SCI, - INTERRUPT_SMI, - INTERRUPT_BOTH, -}; - -enum smi_sci_lvl { - SMI_SCI_LVL_LOW, - SMI_SCI_LVL_HIGH, -}; - -enum smi_sci_dir { - SMI_SCI_EDG, - SMI_SCI_LVL, -}; - -struct smi_sources_t { - int type; - void (*handler)(void); -}; - -struct sci_source { - uint8_t scimap; /* SCIMAP 0-57 */ - uint8_t gpe; /* 32 GPEs */ - uint8_t direction; /* Active High or Low, smi_sci_lvl */ - uint8_t level; /* Edge or Level, smi_sci_dir */ -}; - -void configure_smi(uint8_t smi_num, uint8_t mode); -void configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level); -void configure_scimap(const struct sci_source *sci); -void disable_gevent_smi(uint8_t gevent); -void gpe_configure_sci(const struct sci_source *scis, size_t num_gpes); -void soc_route_sci(uint8_t event); - #endif /* AMD_STONEYRIDGE_SMI_H */ diff --git a/src/soc/amd/stoneyridge/smi_util.c b/src/soc/amd/stoneyridge/smi_util.c index 2fbc8e2d6a..39b2b95a2c 100644 --- a/src/soc/amd/stoneyridge/smi_util.c +++ b/src/soc/amd/stoneyridge/smi_util.c @@ -9,6 +9,7 @@ #include #include #include +#include void configure_smi(uint8_t smi_num, uint8_t mode) { diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c index be55458ac0..c8a113c576 100644 --- a/src/soc/amd/stoneyridge/smihandler.c +++ b/src/soc/amd/stoneyridge/smihandler.c @@ -13,6 +13,7 @@ #include #include #include +#include #include /* bits in smm_io_trap */ diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index c59936d7dc..7661607b95 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include