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mb/google/hatch: Allow USB2/3 wakeups to (un)plug events in dt 

BUG=b:159187889
BRANCH=none
TEST=none

Change-Id: I13626a236f1b7385208c4181150f094cbda490ed
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42714
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
This commit is contained in:
Edward O'Callaghan 2020-06-23 14:11:25 +10:00 committed by Edward O'Callaghan
parent 811284125f
commit a5c2b48e13
1 changed files with 12 additions and 0 deletions
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12
src/mainboard/google/hatch/variants/puff/overridetree.cb
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@ -84,6 +84,18 @@ chip soc/intel/cannonlake
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC0)" # Type-A Port 0
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A Port 4
# Bitmap for Wake Enable on USB attach/detach
register "usb2_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \
USB_PORT_WAKE_ENABLE(3) | \
USB_PORT_WAKE_ENABLE(4) | \
USB_PORT_WAKE_ENABLE(5) | \
USB_PORT_WAKE_ENABLE(6)"
register "usb3_wake_enable_bitmap" = "USB_PORT_WAKE_ENABLE(1) | \
USB_PORT_WAKE_ENABLE(2) | \
USB_PORT_WAKE_ENABLE(3) | \
USB_PORT_WAKE_ENABLE(5) | \
USB_PORT_WAKE_ENABLE(6)"
# Enable eMMC HS400
register "ScsEmmcHs400Enabled" = "1"