Trivial. Re-indent the code.
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Zheng Bao <zheng.bao@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6301 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -41,7 +41,8 @@ static u8 pmio_read(u8 reg)
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return inb(PM_INDEX + 1);
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}
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static void sb700_acpi_init(void) {
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static void sb700_acpi_init(void)
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{
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pmio_write(0x20, ACPI_PM_EVT_BLK & 0xFF);
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pmio_write(0x21, ACPI_PM_EVT_BLK >> 8);
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pmio_write(0x22, ACPI_PM1_CNT_BLK & 0xFF);
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@ -624,7 +625,8 @@ static int smbus_read_byte(u32 device, u32 address)
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return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
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}
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int s3_save_nvram_early(u32 dword, int size, int nvram_pos) {
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int s3_save_nvram_early(u32 dword, int size, int nvram_pos)
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{
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int i;
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printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos);
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@ -637,7 +639,8 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos) {
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return nvram_pos;
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}
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int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) {
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int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
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{
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u32 data = *old_dword;
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int i;
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for (i = 0; i<size; i++) {
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@ -653,7 +656,8 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) {
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}
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#if CONFIG_HAVE_ACPI_RESUME == 1
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static int acpi_is_wakeup_early(void) {
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static int acpi_is_wakeup_early(void)
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{
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u16 tmp;
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tmp = inw(ACPI_PM1_CNT_BLK);
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printk(BIOS_DEBUG, "IN TEST WAKEUP %x\n", tmp);
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@ -661,7 +665,8 @@ static int acpi_is_wakeup_early(void) {
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}
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#endif
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struct cbmem_entry *get_cbmem_toc(void) {
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struct cbmem_entry *get_cbmem_toc(void)
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{
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uint32_t xdata = 0;
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int xnvram_pos = 0xfc, xi;
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for (xi = 0; xi<4; xi++) {
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@ -77,7 +77,8 @@ static void lpc_init(device_t dev)
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#endif
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}
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void set_cbmem_toc(struct cbmem_entry *toc) {
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void set_cbmem_toc(struct cbmem_entry *toc)
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{
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u32 dword = (u32) toc;
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int nvram_pos = 0xfc, i;
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for (i = 0; i<4; i++) {
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@ -53,9 +53,9 @@ static int sata_drive_detect(int portnum, u16 iobar)
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return 0;
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}
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/* This function can be overloaded in mainboard.c */
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void __attribute__((weak)) sb700_setup_sata_phys(struct device *dev) {
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/* This function can be overloaded in mainboard.c */
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void __attribute__((weak)) sb700_setup_sata_phys(struct device *dev)
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{
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/* RPR7.6.1 Program the PHY Global Control to 0x2C00 */
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pci_write_config16(dev, 0x86, 0x2c00);
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@ -41,7 +41,8 @@ static u8 pmio_read(u8 reg)
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return inb(PM_INDEX + 1);
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}
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static void sb800_acpi_init(void) {
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static void sb800_acpi_init(void)
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{
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pmio_write(0x60, ACPI_PM_EVT_BLK & 0xFF);
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pmio_write(0x61, ACPI_PM_EVT_BLK >> 8);
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pmio_write(0x62, ACPI_PM1_CNT_BLK & 0xFF);
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@ -652,7 +653,8 @@ static int smbus_read_byte(u32 device, u32 address)
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return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
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}
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int s3_save_nvram_early(u32 dword, int size, int nvram_pos) {
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int s3_save_nvram_early(u32 dword, int size, int nvram_pos)
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{
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int i;
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printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos);
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@ -665,7 +667,8 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos) {
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return nvram_pos;
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}
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int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) {
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int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
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{
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u32 data = *old_dword;
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int i;
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for (i = 0; i<size; i++) {
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@ -681,7 +684,8 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos) {
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}
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#if CONFIG_HAVE_ACPI_RESUME == 1
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static int acpi_is_wakeup_early(void) {
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static int acpi_is_wakeup_early(void)
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{
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u16 tmp;
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tmp = inw(ACPI_PM1_CNT_BLK);
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printk(BIOS_DEBUG, "IN TEST WAKEUP %x\n", tmp);
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@ -689,7 +693,8 @@ static int acpi_is_wakeup_early(void) {
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}
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#endif
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struct cbmem_entry *get_cbmem_toc(void) {
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struct cbmem_entry *get_cbmem_toc(void)
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{
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uint32_t xdata = 0;
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int xnvram_pos = 0xfc, xi;
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for (xi = 0; xi<4; xi++) {
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