soc/intel/baytrail/pmutil.c: Constify string arrays
This reduces the differences between Bay Trail and Braswell. The resulting binary changes, but it shouldn't matter. Change-Id: Ic930ab7eee265e86a7cc1095021e3744885f2c25 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43184 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
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@ -42,8 +42,7 @@ uint16_t get_pmbase(void)
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return pci_read_config16(get_pcu_dev(), ABASE) & 0xfff8;
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}
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static void print_num_status_bits(int num_bits, uint32_t status,
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const char *bit_names[])
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static void print_num_status_bits(int num_bits, uint32_t status, const char *const bit_names[])
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{
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int i;
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@ -62,7 +61,7 @@ static void print_num_status_bits(int num_bits, uint32_t status,
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static uint32_t print_smi_status(uint32_t smi_sts)
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{
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static const char *smi_sts_bits[] = {
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static const char *const smi_sts_bits[] = {
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[2] = "BIOS",
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[4] = "SLP_SMI",
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[5] = "APM",
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@ -147,7 +146,7 @@ static uint16_t reset_pm1_status(void)
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static uint16_t print_pm1_status(uint16_t pm1_sts)
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{
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static const char *pm1_sts_bits[] = {
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static const char *const pm1_sts_bits[] = {
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[0] = "TMROF",
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[5] = "GBL",
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[8] = "PWRBTN",
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@ -180,7 +179,7 @@ void enable_pm1(uint16_t events)
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static uint32_t print_tco_status(uint32_t tco_sts)
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{
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static const char *tco_sts_bits[] = {
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static const char *const tco_sts_bits[] = {
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[3] = "TIMEOUT",
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[17] = "SECOND_TO",
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};
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@ -242,7 +241,7 @@ static uint32_t reset_gpe_status(void)
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static uint32_t print_gpe_sts(uint32_t gpe_sts)
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{
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static const char *gpe_sts_bits[] = {
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static const char *const gpe_sts_bits[] = {
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[1] = "HOTPLUG",
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[2] = "SWGPE",
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[3] = "PCIE_WAKE0",
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@ -298,17 +297,17 @@ static uint32_t reset_alt_status(void)
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static uint32_t print_alt_sts(uint32_t alt_gpio_smi)
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{
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uint32_t alt_gpio_sts;
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static const char *alt_gpio_smi_sts_bits[] = {
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[0] = "SUS_GPIO_0",
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[1] = "SUS_GPIO_1",
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[2] = "SUS_GPIO_2",
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[3] = "SUS_GPIO_3",
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[4] = "SUS_GPIO_4",
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[5] = "SUS_GPIO_5",
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[6] = "SUS_GPIO_6",
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[7] = "SUS_GPIO_7",
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[8] = "CORE_GPIO_0",
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[9] = "CORE_GPIO_1",
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static const char *const alt_gpio_smi_sts_bits[] = {
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[0] = "SUS_GPIO_0",
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[1] = "SUS_GPIO_1",
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[2] = "SUS_GPIO_2",
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[3] = "SUS_GPIO_3",
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[4] = "SUS_GPIO_4",
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[5] = "SUS_GPIO_5",
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[6] = "SUS_GPIO_6",
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[7] = "SUS_GPIO_7",
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[8] = "CORE_GPIO_0",
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[9] = "CORE_GPIO_1",
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[10] = "CORE_GPIO_2",
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[11] = "CORE_GPIO_3",
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[12] = "CORE_GPIO_4",
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