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mb/ocp/deltalake: Select IPMI OCP to send POST start/end command 

Implement sending POST start/end command to BMC.

TEST=Read POST command log in OpenBMC,
if command received successfully, message may show as below,

root@bmc-oob:~# cat /var/log/messages |grep -i "POST"
 2020 May 28 13:21:22 bmc-oob. user.info fby3-v2020.20.2:
ipmid: POST Start Event for Payload#1
 2020 May 28 13:21:25 bmc-oob. user.info fby3-v2020.20.2:
ipmid: POST End Event for Payload#1
root@bmc-oob:~#

Signed-off-by: TimChu <Tim.Chu@quantatw.com>
Change-Id: I38b512ee97c0eda6ba54482a448ef9ffc27b4ddb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41993
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
TimChu 2020-06-02 00:02:35 -07:00 committed by Philipp Deppenwiese
parent b29d16fc8a
commit a5ca4a0c75
2 changed files with 4 additions and 0 deletions
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1
src/mainboard/ocp/deltalake/Kconfig
View File

@ -10,6 +10,7 @@ config BOARD_SPECIFIC_OPTIONS
select SUPERIO_ASPEED_AST2400
select IPMI_KCS
select IPMI_KCS_ROMSTAGE
select IPMI_OCP
select OCP_DMI
select VPD
select VPD_SMBIOS_VERSION

3
src/mainboard/ocp/deltalake/devicetree.cb
View File

@ -85,6 +85,9 @@ chip soc/intel/xeon_sp/cpx
register "bmc_i2c_address" = "0x20"
register "bmc_boot_timeout" = "60"
end
chip drivers/ocp/ipmi # OCP specific IPMI porting
device pnp ca2.1 on end
end
end # ISA bridge: Intel Device a245
device pci 1f.1 on end # p2sb
device pci 1f.2 on end # Memory controller: Intel Device a221