AGESA boards: Rename files containing OEM configuration
There are other things besides PCIe port configuration that require board specific hooks. Change-Id: I0923651487b9ed5f6f7569ce08e02d993fa5f976 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14527 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
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@ -14,11 +14,11 @@
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#
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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romstage-y += boardid.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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ifeq ($(CONFIG_HUDSON_IMC_FWM), y)
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ramstage-y += fchec.c
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endif
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@ -22,10 +22,10 @@ endif
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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ramstage-y += broadcom.c
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@ -14,7 +14,7 @@
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#
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -14,7 +14,7 @@
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#
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -22,8 +22,8 @@ endif
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -29,9 +29,9 @@ endif
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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romstage-y += gpio.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -0,0 +1 @@
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#include "../f2a85-m/OemCustomize.c"
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@ -1 +0,0 @@
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#include "../f2a85-m/PlatformGnbPcie.c"
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@ -16,11 +16,11 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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## DIMM SPD for on-board memory
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SPD_BIN = $(obj)/spd.bin
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -23,11 +23,11 @@ endif
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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## DIMM SPD for on-board memory
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SPD_BIN = $(obj)/spd.bin
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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## DIMM SPD for on-board memory
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SPD_BIN = $(obj)/spd.bin
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@ -15,8 +15,8 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -15,11 +15,11 @@
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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ramstage-y += ec.c
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smm-y += mainboard_smi.c
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@ -22,8 +22,8 @@ endif
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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ramstage-y += ec.c
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smm-y += mainboard_smi.c
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@ -22,8 +22,8 @@ endif
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -22,8 +22,8 @@ endif
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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@ -23,12 +23,12 @@ endif
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romstage-y += buildOpts.c
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romstage-y += BiosCallOuts.c
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romstage-y += PlatformGnbPcie.c
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romstage-y += OemCustomize.c
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romstage-y += gpio_ftns.c
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ramstage-y += buildOpts.c
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ramstage-y += BiosCallOuts.c
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ramstage-y += PlatformGnbPcie.c
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ramstage-y += OemCustomize.c
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ramstage-y += gpio_ftns.c
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## DIMM SPD for on-board memory
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