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soc/intel/common/cse: Don't use CAR_GLOBAL 

All platforms using this code have NO_CAR_GLOBAL_MIGRATION.

Change-Id: If952ad8129e1fa6e45858cb77ec99c9fec55c4a6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33001
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans 2019-05-25 10:28:11 +02:00 committed by Patrick Georgi
parent 3d6ccd0489
commit a5eed800f3
1 changed files with 9 additions and 13 deletions
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22
src/soc/intel/common/block/cse/cse.c
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@ -13,7 +13,6 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <arch/early_variables.h>
#include <assert.h> #include <assert.h>
#include <commonlib/helpers.h> #include <commonlib/helpers.h>
#include <console/console.h> #include <console/console.h>
@ -71,7 +70,7 @@
static struct cse_device { static struct cse_device {
uintptr_t sec_bar; uintptr_t sec_bar;
} g_cse CAR_GLOBAL; } g_cse;
/* /*
* Initialize the device with provided temporary BAR. If BAR is 0 use a * Initialize the device with provided temporary BAR. If BAR is 0 use a
@ -80,7 +79,6 @@ static struct cse_device {
*/ */
void heci_init(uintptr_t tempbar) void heci_init(uintptr_t tempbar)
{ {
struct cse_device *cse = car_get_var_ptr(&g_cse);
#if defined(__SIMPLE_DEVICE__) #if defined(__SIMPLE_DEVICE__)
pci_devfn_t dev = PCH_DEV_CSE; pci_devfn_t dev = PCH_DEV_CSE;
#else #else
@ -89,7 +87,7 @@ void heci_init(uintptr_t tempbar)
u8 pcireg; u8 pcireg;
/* Assume it is already initialized, nothing else to do */ /* Assume it is already initialized, nothing else to do */
if (cse->sec_bar) if (g_cse.sec_bar)
return; return;
/* Use default pre-ram bar */ /* Use default pre-ram bar */
@ -111,7 +109,7 @@ void heci_init(uintptr_t tempbar)
pcireg |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; pcireg |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
pci_write_config8(dev, PCI_COMMAND, pcireg); pci_write_config8(dev, PCI_COMMAND, pcireg);
cse->sec_bar = tempbar; g_cse.sec_bar = tempbar;
} }
/* Get HECI BAR 0 from PCI configuration space */ /* Get HECI BAR 0 from PCI configuration space */
@ -130,20 +128,18 @@ static uint32_t get_cse_bar(void)
static uint32_t read_bar(uint32_t offset) static uint32_t read_bar(uint32_t offset)
{ {
struct cse_device *cse = car_get_var_ptr(&g_cse);
/* Reach PCI config space to get BAR in case CAR global not available */ /* Reach PCI config space to get BAR in case CAR global not available */
if (!cse->sec_bar) if (!g_cse.sec_bar)
cse->sec_bar = get_cse_bar(); g_cse.sec_bar = get_cse_bar();
return read32((void *)(cse->sec_bar + offset)); return read32((void *)(g_cse.sec_bar + offset));
} }
static void write_bar(uint32_t offset, uint32_t val) static void write_bar(uint32_t offset, uint32_t val)
{ {
struct cse_device *cse = car_get_var_ptr(&g_cse);
/* Reach PCI config space to get BAR in case CAR global not available */ /* Reach PCI config space to get BAR in case CAR global not available */
if (!cse->sec_bar) if (!g_cse.sec_bar)
cse->sec_bar = get_cse_bar(); g_cse.sec_bar = get_cse_bar();
return write32((void *)(cse->sec_bar + offset), val); return write32((void *)(g_cse.sec_bar + offset), val);
} }
static uint32_t read_cse_csr(void) static uint32_t read_cse_csr(void)