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mb/lenovo/x131e: remove PMH7 

This board does not have PMH7.

Change-Id: I382958f012e5f4445efc76c7f36bbdf460c29be4
Signed-off-by: James Ye <jye836@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31065
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
James Ye 2019-01-19 18:25:04 +11:00 committed by Philipp Deppenwiese
parent 769c309e3d
commit a6450d7b76
2 changed files with 1 additions and 8 deletions
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1
src/mainboard/lenovo/x131e/Kconfig
View File

@ -6,7 +6,6 @@ config BOARD_SPECIFIC_OPTIONS
select NORTHBRIDGE_INTEL_SANDYBRIDGE select NORTHBRIDGE_INTEL_SANDYBRIDGE
select USE_NATIVE_RAMINIT select USE_NATIVE_RAMINIT
select SOUTHBRIDGE_INTEL_C216 select SOUTHBRIDGE_INTEL_C216
select EC_LENOVO_PMH7
select EC_LENOVO_H8 select EC_LENOVO_H8
select NO_UART_ON_SUPERIO select NO_UART_ON_SUPERIO
select BOARD_ROMSIZE_KB_12288 select BOARD_ROMSIZE_KB_12288

8
src/mainboard/lenovo/x131e/devicetree.cb
View File

@ -90,18 +90,12 @@ chip northbridge/intel/sandybridge
device pci 1d.0 on end # USB2 EHCI #1 device pci 1d.0 on end # USB2 EHCI #1
device pci 1e.0 off end # PCI bridge device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge PCI-LPC bridge device pci 1f.0 on # LPC bridge PCI-LPC bridge
chip ec/lenovo/pmh7
register "backlight_enable" = "0x01"
register "dock_event_enable" = "0x00"
device pnp ff.1 on end # dummy
end
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
chip ec/lenovo/h8 chip ec/lenovo/h8
device pnp ff.2 on # dummy device pnp ff.1 on # dummy
io 0x60 = 0x62 io 0x60 = 0x62
io 0x62 = 0x66 io 0x62 = 0x66
io 0x64 = 0x1600 io 0x64 = 0x1600