broadcom/cygnus: add new SoC driver

This commit covers bootblock and romstage.

BUG=none
BRANCH=tot
TEST=ran emerge-purin coreboot

Change-Id: I88e2dffb9e46ba5b066190e844a6a7302adcfdc7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b3af6343a74263f086fe82c600559e8204e7dec0
Original-Change-Id: I447ed5f6ed181cfc9d5521b8c57e5fe0036a3f71
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/242854
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9750
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Daisuke Nojiri 2015-01-23 10:06:19 -08:00 committed by Patrick Georgi
parent 105f5b737b
commit a6712f3166
16 changed files with 506 additions and 0 deletions

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################################################################################
## Subdirectories
################################################################################
subdirs-y += broadcom
subdirs-y += imgtec
subdirs-y += intel
subdirs-y += marvell

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##
## This file is part of the coreboot project.
##
## Copyright 2015 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
subdirs-$(CONFIG_SOC_BROADCOM_CYGNUS) += cygnus

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##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config SOC_BROADCOM_CYGNUS
bool
default n
select ARCH_BOOTBLOCK_ARMV7
select ARCH_RAMSTAGE_ARMV7
select ARCH_ROMSTAGE_ARMV7
select ARCH_VERSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select CPU_HAS_BOOTBLOCK_INIT
select DYNAMIC_CBMEM
select EARLY_CONSOLE
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
select HAVE_UART_MEMORY_MAPPED
select HAVE_UART_SPECIAL
select RETURN_FROM_VERSTAGE
if SOC_BROADCOM_CYGNUS
config BOOTBLOCK_CPU_INIT
string
default "soc/broadcom/cygnus/bootblock.c"
endif

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##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
bootblock-y += bootblock.c
bootblock-y += cbmem.c
bootblock-y += i2c.c
bootblock-y += monotonic_timer.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-$(CONFIG_CONSOLE_SERIAL) += uart.c
verstage-y += i2c.c
verstage-y += monotonic_timer.c
verstage-$(CONFIG_SPI_FLASH) += spi.c
verstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
romstage-y += cbmem.c
romstage-y += i2c.c
romstage-y += monotonic_timer.c
romstage-y += romstage.c
romstage-y += sdram.c
romstage-$(CONFIG_SPI_FLASH) += spi.c
romstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
ramstage-y += cbmem.c
ramstage-y += i2c.c
ramstage-y += monotonic_timer.c
ramstage-$(CONFIG_SPI_FLASH) += spi.c
ramstage-$(CONFIG_CONSOLE_SERIAL) += uart.c
CPPFLAGS_common += -Isrc/soc/broadcom/cygnus/include/
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.elf
@printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
$(OBJCOPY_bootblock) -O binary $< $@

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <bootblock_common.h>
#include <console/console.h>
void bootblock_soc_init(void)
{
/*
* typically, this is the place where mmu is initialized to enable
* cache. it helps speed up vboot verification.
*/
}

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <cbmem.h>
#include <stddef.h>
void *cbmem_top(void)
{
return NULL;
}

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <device/i2c.h>
#include <soc/i2c.h>
int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count)
{
return 0;
}
void i2c_init(unsigned int bus, unsigned int hz)
{
printk(BIOS_INFO, "i2c initialization is not implemented\n");
}

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#ifndef __SOC_BROADCOM_CYGNUS_GPIO_H__
#define __SOC_BROADCOM_CYGNUS_GPIO_H__
#include <types.h>
typedef u32 gpio_t;
#endif /* __SOC_BROADCOM_CYGNUS_GPIO_H__ */

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __SOC_BROADCOM_CYGNUS_I2C_H__
#define __SOC_BROADCOM_CYGNUS_I2C_H__
void i2c_init(unsigned int bus, unsigned int hz);
#endif /* __SOC_BROADCOM_CYGNUS_I2C_H__ */

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <memlayout.h>
#include <vendorcode/google/chromeos/memlayout.h>
#include <arch/header.ld>
SECTIONS
{
DRAM_START(0x00000000)
RAMSTAGE(0x00200000, 128K)
POSTRAM_CBFS_CACHE(0x01000000, 1M)
SRAM_START(0x61000000)
TTB(0x61000000, 16K)
BOOTBLOCK(0x61004000, 16K)
PRERAM_CBMEM_CONSOLE(0x61008000, 4K)
VBOOT2_WORK(0x61009000, 12K)
OVERLAP_VERSTAGE_ROMSTAGE(0x6100C000, 40K)
PRERAM_CBFS_CACHE(0x61016000, 1K)
CBFS_HEADER_OFFSET(0x61016800)
STACK(0x61017800, 4K)
SRAM_END(0x610040000)
}

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/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __SOC_BROADCOM_CYGNUS_SDRAM_H__
#define __SOC_BROADCOM_CYGNUS_SDRAM_H__
void sdram_init(void);
#endif /* __SOC_BROADCOM_CYGNUS_SDRAM_H__ */

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <timer.h>
void timer_monotonic_get(struct mono_time *mt)
{
}

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/cache.h>
#include <arch/exception.h>
#include <arch/stages.h>
#include <armv7.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
#include <program_loading.h>
#include <soc/sdram.h>
#include <stdlib.h>
#include <symbols.h>
#include <timestamp.h>
#include <types.h>
#include <vendorcode/google/chromeos/chromeos.h>
void main(void)
{
#if CONFIG_COLLECT_TIMESTAMPS
uint64_t start_romstage_time;
uint64_t before_dram_time;
uint64_t after_dram_time;
uint64_t base_time = timestamp_get();
start_romstage_time = timestamp_get();
#endif
console_init();
#if CONFIG_COLLECT_TIMESTAMPS
before_dram_time = timestamp_get();
#endif
sdram_init();
#if CONFIG_COLLECT_TIMESTAMPS
after_dram_time = timestamp_get();
#endif
mmu_init();
mmu_config_range(0, 4096, DCACHE_OFF);
dcache_mmu_enable();
cbmem_initialize_empty();
#if CONFIG_COLLECT_TIMESTAMPS
timestamp_init(base_time);
timestamp_add(TS_START_ROMSTAGE, start_romstage_time);
timestamp_add(TS_BEFORE_INITRAM, before_dram_time);
timestamp_add(TS_AFTER_INITRAM, after_dram_time);
timestamp_add_now(TS_END_ROMSTAGE);
#endif
run_ramstage();
}

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <console/console.h>
#include <soc/sdram.h>
void sdram_init(void)
{
printk(BIOS_INFO, "sdram initialization is not implemented\n");
}

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <stddef.h>
#include <spi-generic.h>
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs)
{
return NULL;
}
int spi_claim_bus(struct spi_slave *slave)
{
return 0;
}
void spi_release_bus(struct spi_slave *slave)
{
}
int spi_xfer(struct spi_slave *slave, const void *dout,
unsigned out_bytes, void *din, unsigned in_bytes)
{
return 0;
}

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/*
* This file is part of the coreboot project.
*
* Copyright 2015 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <boot/coreboot_tables.h>
#include <console/uart.h>
void uart_init(int idx)
{
}
void uart_tx_byte(int idx, unsigned char data)
{
}
void uart_tx_flush(int idx)
{
}
unsigned char uart_rx_byte(int idx)
{
return '\0';
}
void uart_fill_lb(void *data)
{
}