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soc/intel/skylake: Use SCS common code 

This patch uses common SCS library to setup
sd card.

Change-Id: I06898e30a9b39f169b35f581a3ee09238f0f40c4
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/20217
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
This commit is contained in:
Bora Guvendik 2017-06-14 16:54:39 -07:00 committed by Aaron Durbin
parent 65623b7264
commit a677feca88
2 changed files with 18 additions and 64 deletions
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1
src/soc/intel/skylake/Kconfig
View File

@ -63,6 +63,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_RTC select SOC_INTEL_COMMON_BLOCK_RTC
select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SATA select SOC_INTEL_COMMON_BLOCK_SATA
select SOC_INTEL_COMMON_BLOCK_SCS
select SOC_INTEL_COMMON_BLOCK_SMBUS select SOC_INTEL_COMMON_BLOCK_SMBUS
select SOC_INTEL_COMMON_BLOCK_TIMER select SOC_INTEL_COMMON_BLOCK_TIMER
select SOC_INTEL_COMMON_BLOCK_UART select SOC_INTEL_COMMON_BLOCK_UART

81
src/soc/intel/skylake/sd.c
View File

@ -13,76 +13,29 @@
* GNU General Public License for more details. * GNU General Public License for more details.
*/ */
#include <arch/acpi_device.h> #include <intelblocks/sd.h>
#include <arch/acpigen.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <gpio.h>
#include <soc/ramstage.h>
#include "chip.h" #include "chip.h"
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) int sd_fill_soc_gpio_info(struct acpi_gpio* gpio, struct device *dev)
static void sd_fill_ssdt(struct device *dev)
{ {
config_t *config = dev->chip_info; config_t *config = dev->chip_info;
const char *path;
struct acpi_gpio default_gpio = {
.type = ACPI_GPIO_TYPE_INTERRUPT,
.pull = ACPI_GPIO_PULL_NONE,
.irq.mode = ACPI_IRQ_EDGE_TRIGGERED,
.irq.polarity = ACPI_IRQ_ACTIVE_BOTH,
.irq.shared = ACPI_IRQ_SHARED,
.irq.wake = ACPI_IRQ_WAKE,
.interrupt_debounce_timeout = 10000, /* 100ms */
.pin_count = 1,
.pins = { config->sdcard_cd_gpio_default }
};
struct acpi_dp *dp;
if (!dev->enabled)
return;
/* Nothing to write if GPIO is not set in devicetree */ /* Nothing to write if GPIO is not set in devicetree */
if (!config->sdcard_cd_gpio_default && !config->sdcard_cd_gpio.pins[0]) if(!config->sdcard_cd_gpio_default && !config->sdcard_cd_gpio.pins[0])
return; return -1;
/* Use device path as the Scope for the SSDT */ if (config->sdcard_cd_gpio_default) {
path = acpi_device_path(dev); gpio->type = ACPI_GPIO_TYPE_INTERRUPT;
if (!path) gpio->pull = ACPI_GPIO_PULL_NONE;
return; gpio->irq.mode = ACPI_IRQ_EDGE_TRIGGERED;
acpigen_write_scope(path); gpio->irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
acpigen_write_name("_CRS"); gpio->irq.shared = ACPI_IRQ_SHARED;
gpio->irq.wake = ACPI_IRQ_WAKE;
gpio->interrupt_debounce_timeout = 10000; /* 100ms */
gpio->pin_count = 1;
gpio->pins[0] = config->sdcard_cd_gpio_default;
} else
gpio = &config->sdcard_cd_gpio;
/* Write GpioInt() as default (if set) or custom from devicetree */ return 0;
acpigen_write_resourcetemplate_header();
if (config->sdcard_cd_gpio_default)
acpi_device_write_gpio(&default_gpio);
else
acpi_device_write_gpio(&config->sdcard_cd_gpio);
acpigen_write_resourcetemplate_footer();
/* Bind the cd-gpio name to the GpioInt() resource */
dp = acpi_dp_new_table("_DSD");
acpi_dp_add_gpio(dp, "cd-gpio", path, 0, 0, 1);
acpi_dp_write(dp);
acpigen_pop_len();
} }
#endif
static struct device_operations dev_ops = {
.read_resources = &pci_dev_read_resources,
.set_resources = &pci_dev_set_resources,
.enable_resources = &pci_dev_enable_resources,
.ops_pci = &soc_pci_ops,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
.acpi_fill_ssdt_generator = &sd_fill_ssdt,
#endif
};
static const struct pci_driver pch_sd __pci_driver = {
.ops = &dev_ops,
.vendor = PCI_VENDOR_ID_INTEL,
.device = 0x9d2d
};