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libpayload/storage: Enable bus mastering for AHCI 

This is (thankfully) not done by coreboot any more for recent chipsets.

Change-Id: If56e38037f7b1e53871ee63e6ff297028c59d493
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20763
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Nico Huber 2017-07-24 17:09:35 +02:00 committed by Nico Huber
parent 812f1783bb
commit a67dd9de77
1 changed files with 5 additions and 0 deletions
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5
payloads/libpayload/drivers/storage/ahci.c
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@ -34,6 +34,7 @@
#include <string.h>
#include <libpayload.h>
#include <pci.h>
#include <pci/pci.h>
#include <storage/ata.h>
#include <storage/ahci.h>
@ -267,6 +268,10 @@ static void ahci_init_pci(pcidev_t dev)
/* Set AHCI access mode. */
ctrl->global_ctrl |= HBA_CTRL_AHCI_EN;
/* Enable bus mastering. */
const u16 command = pci_read_config16(dev, PCI_COMMAND);
pci_write_config16(dev, PCI_COMMAND, command | PCI_COMMAND_MASTER);
/* Probe for devices. */
for (i = 0; i < 32; ++i) {
if (ctrl->ports_impl & (1 << i))