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mb/google/poppy/variants/soraka: Set PCH thermal trip point to 75 degreeC 

PMC logic shuts down the thermal sensor when CPU is in a C-state and
DTS Temp <= Low Temp Threshold in case Dynamic Thermal Shutdown in
S0ix is enabled.

BUG=b:69110373
BRANCH=none
TEST=Ensure Thermal Device(B0: D20: F2) TSPM offset 0x1c[LTT (8:0)]
value is 0xFA.

Change-Id: I6246300a4376a0194950d4de277af040b10b6c1f
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Subrata Banik 2017-11-29 16:42:10 +05:30
parent 771d611f9e
commit a6802ec30f
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/google/poppy/variants/soraka/devicetree.cb
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@ -265,6 +265,9 @@ chip soc/intel/skylake
# Lock Down # Lock Down
register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT" register "chipset_lockdown" = "CHIPSET_LOCKDOWN_COREBOOT"
# PCH Trip Temperature in degree C
register "pch_trip_temp" = "75"
device cpu_cluster 0 on device cpu_cluster 0 on
device lapic 0 on end device lapic 0 on end
end end