soc/intel/apollolake: Move privilege drop to later stage
Previously privilege drop was happening "too early" and that caused some PMC IPC programming (performed in FSP) to fail because sideband was already locked out. This change set moves privilege drop to later stage, after last FSP notify call. BRANCH=reef BUG=chrome-os-partner:60657 TEST=iotools rdmsr X 0x121, make sure they can't be read. Also dmesg|grep -i IPC to make sure there are no errors related Change-Id: Ia3a774aee5fbf92805a5c69093bfbd3d7682c3a7 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/17769 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -36,6 +36,7 @@ config CPU_SPECIFIC_OPTIONS
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select NO_FIXED_XIP_ROM_SIZE
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select NO_XIP_EARLY_STAGES
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select PARALLEL_MP
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select PARALLEL_MP_AP_WORK
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select PCIEXP_ASPM
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select PCIEXP_COMMON_CLOCK
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select PCIEXP_CLK_PM
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@ -21,6 +21,7 @@
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#include <cbmem.h>
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#include <console/console.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/mp.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <fsp/api.h>
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@ -499,11 +500,26 @@ struct chip_operations soc_intel_apollolake_ops = {
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.final = &soc_final
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};
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static void drop_privilege_all(void)
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{
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/* Drop privilege level on all the CPUs */
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if (mp_run_on_all_cpus(&enable_untrusted_mode, 1000) < 0)
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printk(BIOS_ERR, "failed to enable untrusted mode\n");
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}
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void platform_fsp_notify_status(enum fsp_notify_phase phase)
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{
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if (phase == END_OF_FIRMWARE) {
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/* Hide the P2SB device to align with previous behavior. */
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if (phase == END_OF_FIRMWARE)
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p2sb_hide();
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/*
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* As per guidelines BIOS is recommended to drop CPU privilege
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* level to IA_UNTRUSTED. After that certain device registers
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* and MSRs become inaccessible supposedly increasing system
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* security.
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*/
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drop_privilege_all();
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}
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}
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/*
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@ -53,7 +53,7 @@ static const struct reg_script core_msr_script[] = {
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REG_SCRIPT_END
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};
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static void enable_untrusted_mode(void)
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void enable_untrusted_mode(void)
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{
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msr_t msr = rdmsr(MSR_POWER_MISC);
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msr.lo |= ENABLE_IA_UNTRUSTED;
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@ -70,8 +70,6 @@ static void soc_core_init(device_t cpu)
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* implemented in microcode.
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*/
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enable_pm_timer_emulation();
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/* Drop privilege level */
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enable_untrusted_mode();
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}
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static struct device_operations cpu_dev_ops = {
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@ -24,6 +24,7 @@
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void apollolake_init_cpus(struct device *dev);
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void set_max_freq(void);
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void enable_untrusted_mode(void);
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#endif
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#define CPUID_APOLLOLAKE_A0 0x506c8
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