mb/intel/glkrvp: Enable ThunderPeak wifi card
This enables ThunderPeak WiFi card on M.2. TEST=Verify wlan card shows up in lspci Change-Id: I5b3f871bdc67bfc4ed283b997b2a5698451b2bd2 Signed-off-by: Roy Mingi Park <roy.mingi.park@intel.com> Reviewed-on: https://review.coreboot.org/24931 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -9,13 +9,13 @@ chip soc/intel/apollolake
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register "pcie_rp_clkreq_pin[1]" = "3" # wifi/bt
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register "pcie_rp_clkreq_pin[1]" = "3" # wifi/bt
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register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
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register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED"
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register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
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register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED"
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register "pcie_rp_clkreq_pin[4]" = "1"
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register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED"
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register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
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register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED"
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# GPIO for PERST_0
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# GPIO for PERST_0
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# If the Board has PERST_0 signal, assign the GPIO
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# If the Board has PERST_0 signal, assign the GPIO
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# If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
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# If the Board does not have PERST_0, assign GPIO_PRT0_UDEF
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register "prt0_gpio" = "GPIO_PRT0_UDEF"
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register "prt0_gpio" = "GPIO_163"
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# GPIO for SD card detect
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# GPIO for SD card detect
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register "sdcard_cd_gpio" = "GPIO_186"
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register "sdcard_cd_gpio" = "GPIO_186"
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@ -125,9 +125,9 @@ chip soc/intel/apollolake
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device pci 12.0 on end # - SATA
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device pci 12.0 on end # - SATA
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device pci 13.0 off end # - PCIe-A 0 Slot 1
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device pci 13.0 off end # - PCIe-A 0 Slot 1
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device pci 13.1 off end # - PCIe-A 1
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device pci 13.1 off end # - PCIe-A 1
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device pci 13.2 on end # - PCIe-A 2 Onboard Lan
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device pci 13.2 off end # - PCIe-A 2 Onboard Lan
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device pci 13.3 off end # - PCIe-A 3
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device pci 13.3 off end # - PCIe-A 3
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device pci 14.0 off end # - PCIe-B 0 Slot2
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device pci 14.0 off end # - PCIe-B 0 Slot2
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device pci 14.1 on end # - PCIe-B 1 Onboard M2 Slot(Wifi/BT)
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device pci 14.1 on end # - PCIe-B 1 Onboard M2 Slot(Wifi/BT)
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device pci 15.0 on end # - XHCI
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device pci 15.0 on end # - XHCI
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device pci 15.1 off end # - XDCI
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device pci 15.1 off end # - XDCI
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@ -51,7 +51,7 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_GPO_GPIO_DRIVER(GPIO_24, 1, DEEP, DN_20K),
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PAD_CFG_GPO_GPIO_DRIVER(GPIO_24, 1, DEEP, DN_20K),
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_25, 1, DEEP, UP_20K, TxLASTRxE, SAME),/*WWAN /RF_KILL_GPS*/
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_25, 1, DEEP, UP_20K, TxLASTRxE, SAME),/*WWAN /RF_KILL_GPS*/
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PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_26, UP_20K, DEEP, NF2, HIZCRx1, DISPUPD),/* NFC Interrupt */
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PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_26, UP_20K, DEEP, NF2, HIZCRx1, DISPUPD),/* NFC Interrupt */
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PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_27, UP_20K, DEEP, NF2, TxLASTRxE, DISPUPD),/* RF_KILL_WiFi/WiFi_Disable */
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_27, 1, DEEP, NONE, IGNORE, DISPUPD),/* RF_KILL_WiFi/WiFi_Disable */
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_28, 1, DEEP, UP_20K, TxLASTRxE, DISPUPD),/* RF_KILL_BT/BT_Disable */
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_28, 1, DEEP, UP_20K, TxLASTRxE, DISPUPD),/* RF_KILL_BT/BT_Disable */
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_29, 1, DEEP, UP_20K, HIZCRx0, DISPUPD),/* Codec Power Down: Ouput/ISH_GPIO_3*/
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PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_29, 1, DEEP, UP_20K, HIZCRx0, DISPUPD),/* Codec Power Down: Ouput/ISH_GPIO_3*/
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PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_30, DN_20K, DEEP, NF1), /* ISH_GPIO_4 */
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PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_30, DN_20K, DEEP, NF1), /* ISH_GPIO_4 */
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@ -151,9 +151,9 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_117, UP_20K, DEEP, NF1),/*PCIE_WAKE1_B*/
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PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_117, UP_20K, DEEP, NF1),/*PCIE_WAKE1_B*/
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PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_118, UP_20K, DEEP, NF1),/*PCIE_WAKE2_B*/
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PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_118, UP_20K, DEEP, NF1),/*PCIE_WAKE2_B*/
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PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_119, UP_20K, DEEP, NF1),/*PCIE_WAKE3_B*/
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PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_119, UP_20K, DEEP, NF1),/*PCIE_WAKE3_B*/
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PAD_CFG_NF_IOSSTATE(GPIO_120, UP_20K, DEEP, NF1, HIZCRx1),/*PCIE_CLKREQ0_B*/
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PAD_CFG_GPI(GPIO_120, UP_20K, DEEP), /* unused */
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PAD_CFG_NF_IOSSTATE(GPIO_121, UP_20K, DEEP, NF1, HIZCRx1),/*PCIE_CLKREQ1_B*/
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PAD_CFG_GPI(GPIO_121, UP_20K, DEEP), /* unused */
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PAD_CFG_NF_IOSSTATE(GPIO_122, UP_20K, DEEP, NF1, HIZCRx1),/*PCIE_CLKREQ2_B*/
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PAD_CFG_GPI(GPIO_122, UP_20K, DEEP), /* unused */
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PAD_CFG_NF_IOSSTATE(GPIO_123, UP_20K, DEEP, NF1, HIZCRx1),/*PCIE_CLKREQ3_B*/
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PAD_CFG_NF_IOSSTATE(GPIO_123, UP_20K, DEEP, NF1, HIZCRx1),/*PCIE_CLKREQ3_B*/
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PAD_CFG_NF_IOSSTATE(GPIO_124, UP_20K, DEEP, NF1, HIZCRx0),/*HV_DDI0_DDC_SDA*/
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PAD_CFG_NF_IOSSTATE(GPIO_124, UP_20K, DEEP, NF1, HIZCRx0),/*HV_DDI0_DDC_SDA*/
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PAD_CFG_NF_IOSSTATE(GPIO_125, UP_20K, DEEP, NF1, HIZCRx0),/*HV_DDI0_DDC_SCL*/
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PAD_CFG_NF_IOSSTATE(GPIO_125, UP_20K, DEEP, NF1, HIZCRx0),/*HV_DDI0_DDC_SCL*/
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