GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

amd/car/post_cache_as_ram: Switch stack in assembly rather than in C 

Compiler may do loads of optimisations around stack switch and so it's allowed
to break stack switch as it sees fit. Do it in assembly instead.

Not tested.

Change-Id: I277a62a9052e8fe9b04e7c65d149e087282ac2a2
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4286
Tested-by: build bot (Jenkins)
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Vladimir Serbinenko 2013-11-26 17:49:29 +01:00 committed by Stefan Reinauer
parent 77a5abe780
commit a6c29fe684
2 changed files with 22 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/cpu/amd/car/cache_as_ram.inc
View File

@ -414,10 +414,22 @@ CAR_FAM10_ap_out:
pushl %ebx /* Init detected. */ pushl %ebx /* Init detected. */
pushl %eax /* BIST */ pushl %eax /* BIST */
call cache_as_ram_main call cache_as_ram_main
/* We will not go back. */ /* We will not go back. */
post_code(0xaf) /* Should never see this POST code. */ post_code(0xaf) /* Should never see this POST code. */
.globl cache_as_ram_switch_stack
cache_as_ram_switch_stack:
/* Return address. */
popl %eax
/* Resume memory. */
popl %eax
subl $(( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_RAMTOP) )), %esp
pushl %eax
call cache_as_ram_new_stack
all_mtrr_msrs: all_mtrr_msrs:
/* fixed MTRR MSRs */ /* fixed MTRR MSRs */
.long MTRRfix64K_00000_MSR .long MTRRfix64K_00000_MSR

25
src/cpu/amd/car/post_cache_as_ram.c
View File

@ -75,11 +75,11 @@ static void vErrata343(void)
#endif #endif
} }
void cache_as_ram_switch_stack(void *resume_backup_memory);
static void post_cache_as_ram(void) static void post_cache_as_ram(void)
{ {
#if CONFIG_HAVE_ACPI_RESUME void *resume_backup_memory = NULL;
void *resume_backup_memory;
#endif
#if 1 #if 1
{ {
/* Check value of esp to verify if we have enough room for stack in Cache as RAM */ /* Check value of esp to verify if we have enough room for stack in Cache as RAM */
@ -92,9 +92,6 @@ static void post_cache_as_ram(void)
} }
#endif #endif
unsigned testx = 0x5a5a5a5a;
print_debug_pcar("testx = ", testx);
/* copy data from cache as ram to /* copy data from cache as ram to
ram need to set CONFIG_RAMTOP to 2M and use var mtrr instead. ram need to set CONFIG_RAMTOP to 2M and use var mtrr instead.
*/ */
@ -112,21 +109,19 @@ static void post_cache_as_ram(void)
vErrata343(); vErrata343();
memcopy((void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); //inline memcopy((void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); //inline
cache_as_ram_switch_stack(resume_backup_memory);
}
__asm__ volatile ( void
/* set new esp */ /* before CONFIG_RAMBASE */ cache_as_ram_new_stack (void *resume_backup_memory);
"subl %0, %%esp\n\t"
::"a"( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_RAMTOP) )
/* discard all registers (eax is used for %0), so gcc redoes everything
after the stack is moved */
: "cc", "memory", "%ebx", "%ecx", "%edx", "%esi", "%edi", "%ebp"
);
void
cache_as_ram_new_stack (void *resume_backup_memory __attribute__ ((unused)))
{
/* We can put data to stack again */ /* We can put data to stack again */
/* only global variable sysinfo in cache need to be offset */ /* only global variable sysinfo in cache need to be offset */
print_debug("Done\n"); print_debug("Done\n");
print_debug_pcar("testx = ", testx);
print_debug("Disabling cache as ram now \n"); print_debug("Disabling cache as ram now \n");