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AMD AGESA cimx/sb700: Drop APIC_ID_OFFSET and MAX_PHYSICAL_CPUS 

Following boards use cimx/sb700:
  amd/dinar
  supermicro/h8qgi
  supermicro/h8scm
  tyan/s8226

Only amd/dinar had APIC_ID_OFFSET defined, thus all had 0x0.
There was a nonsense preprocessor directive (MAX_CPUS * MAX_PHYSICAL_CPUS >= 1).

Except for tyan, (MAX_CPUS * MAX_PHYSICAL_CPUS) % 256 == 0.
Together with documented 4-bit restriction for APIC ID field, this APIC ID
programming matches with MP tables and ACPI tables.

I believe this would also fix cases of cimx/sb700 with MAX_CPUS<16, which
we do not have in the tree.

Change-Id: If8d65e95788ba02fc8d331a7af03a4d0d8cf5c69
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5539
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Kyösti Mälkki 2014-04-16 09:43:40 +03:00
parent 35546deba6
commit a6c525a7d5
13 changed files with 41 additions and 76 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
src/mainboard/amd/dinar/Kconfig
View File

@ -42,10 +42,6 @@ config MAINBOARD_DIR
string
default amd/dinar
config APIC_ID_OFFSET
hex
default 0x0
config MAINBOARD_PART_NUMBER
string
default "Dinar"
@ -58,10 +54,6 @@ config MAX_CPUS
int
default 64
config MAX_PHYSICAL_CPUS
int
default 16
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

11
src/mainboard/amd/dinar/acpi_tables.c
View File

@ -73,12 +73,11 @@ unsigned long acpi_fill_madt(unsigned long current)
* For systems with < 16 APICs, put the Local-APICs at 0..n and
* put the IO-APICs at (n + 1)..z
*/
#if CONFIG_MAX_CPUS >= 16
apicid_sb700 = 0x0;
#else
apicid_sb700 = CONFIG_MAX_CPUS + 1
#endif
apicid_rd890 = apicid_sb700 + 1;
if (CONFIG_MAX_CPUS >= 16)
apicid_sb700 = 0x0;
else
apicid_sb700 = CONFIG_MAX_CPUS + 1;
apicid_rd890 = apicid_sb700 + 1;
/* create all subtables for processors */
current = acpi_create_madt_lapics(current);

11
src/mainboard/amd/dinar/mptable.c
View File

@ -58,12 +58,11 @@ static void *smp_write_config_table(void *v)
* For systems with < 16 APICs, put the Local-APICs at 0..n and
* put the IO-APICs at (n + 1)..z
*/
#if CONFIG_MAX_CPUS >= 16
apicid_sb700 = 0x0;
#else
apicid_sb700 = CONFIG_MAX_CPUS + 1
#endif
apicid_rd890 = apicid_sb700 + 1;
if (CONFIG_MAX_CPUS >= 16)
apicid_sb700 = 0x0;
else
apicid_sb700 = CONFIG_MAX_CPUS + 1;
apicid_rd890 = apicid_sb700 + 1;
//bus_sb700[0], TODO: why bus_sb700[0] use same value of bus_rd890[0] assigned by get_pci1234(), instead of 0.
dev = dev_find_slot(0, PCI_DEVFN(sbdn_sb700 + 0x14, 0));

4
src/mainboard/supermicro/h8qgi/Kconfig
View File

@ -54,10 +54,6 @@ config MAX_CPUS
int
default 64
config MAX_PHYSICAL_CPUS
int
default 16
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

11
src/mainboard/supermicro/h8qgi/acpi_tables.c
View File

@ -72,12 +72,11 @@ unsigned long acpi_fill_madt(unsigned long current)
* For systems with < 16 APICs, put the Local-APICs at 0..n and
* put the IO-APICs at (n + 1)..z
*/
#if CONFIG_MAX_CPUS >= 16
apicid_sp5100 = 0x0;
#else
apicid_sp5100 = CONFIG_MAX_CPUS + 1
#endif
apicid_sr5650 = apicid_sp5100 + 1;
if (CONFIG_MAX_CPUS >= 16)
apicid_sp5100 = 0x0;
else
apicid_sp5100 = CONFIG_MAX_CPUS + 1;
apicid_sr5650 = apicid_sp5100 + 1;
/* create all subtables for processors */
current = acpi_create_madt_lapics(current);

9
src/mainboard/supermicro/h8qgi/mptable.c
View File

@ -58,11 +58,10 @@ static void *smp_write_config_table(void *v)
* For systems with < 16 APICs, put the Local-APICs at 0..n and
* put the IO-APICs at (n + 1)..z
*/
#if CONFIG_MAX_CPUS >= 16
apicid_sp5100 = 0x0;
#else
apicid_sp5100 = CONFIG_MAX_CPUS + 1
#endif
if (CONFIG_MAX_CPUS >= 16)
apicid_sp5100 = 0x0;
else
apicid_sp5100 = CONFIG_MAX_CPUS + 1;
apicid_sr5650 = apicid_sp5100 + 1;
dev = dev_find_slot(0, PCI_DEVFN(sbdn_sp5100 + 0x14, 0));

4
src/mainboard/supermicro/h8scm/Kconfig
View File

@ -53,10 +53,6 @@ config MAX_CPUS
int
default 64
config MAX_PHYSICAL_CPUS
int
default 16
config CPU_ADDR_BITS
int
default 36 # TODO: Set it conservatively to match both fam10 & 15

11
src/mainboard/supermicro/h8scm/acpi_tables.c
View File

@ -72,12 +72,11 @@ unsigned long acpi_fill_madt(unsigned long current)
* For systems with < 16 APICs, put the Local-APICs at 0..n and
* put the IO-APICs at (n + 1)..z
*/
#if CONFIG_MAX_CPUS >= 16
apicid_sp5100 = 0x0;
#else
apicid_sp5100 = CONFIG_MAX_CPUS + 1
#endif
apicid_sr5650 = apicid_sp5100 + 1;
if (CONFIG_MAX_CPUS >= 16)
apicid_sp5100 = 0x0;
else
apicid_sp5100 = CONFIG_MAX_CPUS + 1;
apicid_sr5650 = apicid_sp5100 + 1;
/* create all subtables for processors */
current = acpi_create_madt_lapics(current);

9
src/mainboard/supermicro/h8scm/mptable.c
View File

@ -58,11 +58,10 @@ static void *smp_write_config_table(void *v)
* For systems with < 16 APICs, put the Local-APICs at 0..n and
* put the IO-APICs at (n + 1)..z
*/
#if CONFIG_MAX_CPUS >= 16
apicid_sp5100 = 0x0;
#else
apicid_sp5100 = CONFIG_MAX_CPUS + 1
#endif
if (CONFIG_MAX_CPUS >= 16)
apicid_sp5100 = 0x0;
else
apicid_sp5100 = CONFIG_MAX_CPUS + 1;
apicid_sr5650 = apicid_sp5100 + 1;
dev = dev_find_slot(0, PCI_DEVFN(sbdn_sp5100 + 0x14, 0));

4
src/mainboard/tyan/s8226/Kconfig
View File

@ -54,10 +54,6 @@ config MAX_CPUS
int
default 64
config MAX_PHYSICAL_CPUS
int
default 2
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

11
src/mainboard/tyan/s8226/acpi_tables.c
View File

@ -72,12 +72,11 @@ unsigned long acpi_fill_madt(unsigned long current)
* For systems with < 16 APICs, put the Local-APICs at 0..n and
* put the IO-APICs at (n + 1)..z
*/
#if CONFIG_MAX_CPUS >= 16
apicid_sp5100 = 0x0;
#else
apicid_sp5100 = CONFIG_MAX_CPUS + 1
#endif
apicid_sr5650 = apicid_sp5100 + 1;
if (CONFIG_MAX_CPUS >= 16)
apicid_sp5100 = 0x0;
else
apicid_sp5100 = CONFIG_MAX_CPUS + 1;
apicid_sr5650 = apicid_sp5100 + 1;
/* create all subtables for processors */
current = acpi_create_madt_lapics(current);

9
src/mainboard/tyan/s8226/mptable.c
View File

@ -58,11 +58,10 @@ static void *smp_write_config_table(void *v)
* For systems with < 16 APICs, put the Local-APICs at 0..n and
* put the IO-APICs at (n + 1)..z
*/
#if CONFIG_MAX_CPUS >= 16
apicid_sp5100 = 0x0;
#else
apicid_sp5100 = CONFIG_MAX_CPUS + 1
#endif
if (CONFIG_MAX_CPUS >= 16)
apicid_sp5100 = 0x0;
else
apicid_sp5100 = CONFIG_MAX_CPUS + 1;
apicid_sr5650 = apicid_sp5100 + 1;
dev = dev_find_slot(0, PCI_DEVFN(sbdn_sp5100 + 0x14, 0));

15
src/southbridge/amd/cimx/sb700/late.c
View File

@ -218,22 +218,15 @@ static void sb700_enable(device_t dev)
case (0x14 << 3) | 0: /* 0:14:0 SMBUS */
{
#if 1
u32 ioapic_base;
printk(BIOS_DEBUG, "sm_init().\n");
ioapic_base = IO_APIC_ADDR;
clear_ioapic(ioapic_base);
/* I/O APIC IDs are normally limited to 4-bits. Enforce this limit. */
#if (CONFIG_APIC_ID_OFFSET == 0 && CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS >= 1)
/* Assign the ioapic ID the next available number after the processor core local APIC IDs */
setup_ioapic(ioapic_base, (UINT8) (CONFIG_MAX_CPUS * CONFIG_MAX_PHYSICAL_CPUS));
#elif (CONFIG_APIC_ID_OFFSET > 0)
/* Assign the ioapic ID the value 0. Processor APIC IDs follow. */
setup_ioapic(ioapic_base, 0);
#else
#error "The processor APIC IDs must be lifted to make room for the I/O APIC ID"
#endif
#endif
if (CONFIG_MAX_CPUS >= 16)
setup_ioapic(ioapic_base, 0);
else
setup_ioapic(ioapic_base, CONFIG_MAX_CPUS + 1);
}
break;