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soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h 

gpe0_en_* seem to have been copied over from previous generations but
recent SoCs don't use it. This change gets rid of these unused
members.

Change-Id: I165e66aeefde4efea4484f588c774795987ca461
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37659
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Furquan Shaikh 2019-12-11 10:15:59 -08:00 committed by Patrick Georgi
parent 149d523c9a
commit a6eab80dc9
4 changed files with 0 additions and 23 deletions
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6
src/soc/intel/cannonlake/chip.h
View File

@ -45,12 +45,6 @@ struct soc_intel_cannonlake_config {
/* Common struct containing soc config data required by common code */
struct soc_intel_common_config common_soc_config;
/* GPE configuration */
uint32_t gpe0_en_1; /* GPE0_EN_31_0 */
uint32_t gpe0_en_2; /* GPE0_EN_63_32 */
uint32_t gpe0_en_3; /* GPE0_EN_95_64 */
uint32_t gpe0_en_4; /* GPE0_EN_127_96 / GPE_STD */
/* Gpio group routed to each dword of the GPE0 block. Values are
* of the form GPP_[A:G] or GPD. */
uint8_t gpe0_dw0; /* GPE0_31_0 STS/EN */

6
src/soc/intel/icelake/chip.h
View File

@ -35,12 +35,6 @@ struct soc_intel_icelake_config {
/* Common struct containing soc config data required by common code */
struct soc_intel_common_config common_soc_config;
/* GPE configuration */
uint32_t gpe0_en_1; /* GPE0_EN_31_0 */
uint32_t gpe0_en_2; /* GPE0_EN_63_32 */
uint32_t gpe0_en_3; /* GPE0_EN_95_64 */
uint32_t gpe0_en_4; /* GPE0_EN_127_96 / GPE_STD */
/* Gpio group routed to each dword of the GPE0 block. Values are
* of the form GPP_[A:G] or GPD. */
uint8_t gpe0_dw0; /* GPE0_31_0 STS/EN */

5
src/soc/intel/skylake/chip.h
View File

@ -73,11 +73,6 @@ struct soc_intel_skylake_config {
uint8_t pirqg_routing;
uint8_t pirqh_routing;
/* GPE configuration */
uint32_t gpe0_en_1; /* GPE0_EN_31_0 */
uint32_t gpe0_en_2; /* GPE0_EN_63_32 */
uint32_t gpe0_en_3; /* GPE0_EN_95_64 */
uint32_t gpe0_en_4; /* GPE0_EN_127_96 / GPE_STD */
/* Gpio group routed to each dword of the GPE0 block. Values are
* of the form GPP_[A:G] or GPD. */
uint8_t gpe0_dw0; /* GPE0_31_0 STS/EN */

6
src/soc/intel/tigerlake/chip.h
View File

@ -35,12 +35,6 @@ struct soc_intel_tigerlake_config {
/* Common struct containing soc config data required by common code */
struct soc_intel_common_config common_soc_config;
/* GPE configuration */
uint32_t gpe0_en_1; /* GPE0_EN_31_0 */
uint32_t gpe0_en_2; /* GPE0_EN_63_32 */
uint32_t gpe0_en_3; /* GPE0_EN_95_64 */
uint32_t gpe0_en_4; /* GPE0_EN_127_96 / GPE_STD */
/* Gpio group routed to each dword of the GPE0 block. Values are
* of the form GPP_[A:G] or GPD. */
uint8_t gpe0_dw0; /* GPE0_31_0 STS/EN */