GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mainboard/asus/kfsn4-dre: Add memory interleave options to NVRAM 

These values were originally hard-coded in the AMD MCT wrapper.

Change-Id: I12056d38d5348e70a44c192385e22e715e207792
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8454
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Timothy Pearson 2015-02-14 17:28:49 -06:00 committed by Alexandru Gagniuc
parent c936624433
commit a70093611f
2 changed files with 6 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/asus/kfsn4-dre/cmos.default
View File

@ -7,4 +7,6 @@ ECC_memory = Enable
ECC_redirection = Disable ECC_redirection = Disable
ecc_scrub_rate = 1.28us ecc_scrub_rate = 1.28us
interleave_chip_selects = Enable interleave_chip_selects = Enable
interleave_nodes = Disable
interleave_memory_channels = Enable
power_on_after_fail = Enable power_on_after_fail = Enable

6
src/mainboard/asus/kfsn4-dre/cmos.layout
View File

@ -54,8 +54,10 @@ entries
393 3 e 5 baud_rate 393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate 396 5 e 10 ecc_scrub_rate
401 1 e 1 interleave_chip_selects 401 1 e 1 interleave_chip_selects
402 2 e 8 max_mem_clock 402 1 e 1 interleave_nodes
404 1 e 2 multi_core 403 1 e 1 interleave_memory_channels
404 2 e 8 max_mem_clock
406 1 e 2 multi_core
412 4 e 6 debug_level 412 4 e 6 debug_level
416 4 e 7 boot_first 416 4 e 7 boot_first
420 4 e 7 boot_second 420 4 e 7 boot_second