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console: Add UART8250MEM 32bit support 

This patch adds UART8250MEM_32 feature flag to support
UART8250 compatible with 32bit access in memory mapped mode.

[pg: rebuilt to reuse the existing UART8250 8bit access driver
which reduces code duplication.]

Change-Id: I310e70dfab81dcca575e9931e0ccf93af70efa40
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0c3b2c628b854e8334540ff5158c2587dbfabf95
Original-Change-Id: I07ee256f25e48480372af9a9255bf487c331e51d
Original-Signed-off-by: Rishavnath Satapathy <rishavnath.satapathy@intel.com>
Original-Signed-off-by: Naveen Krishna Chatradhi <naveenkrishna.ch@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/271759
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Wenkai Du <wenkai.du@intel.com>
Original-Commit-Queue: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: http://review.coreboot.org/10998
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Naveen Krishna Chatradhi 2015-07-08 14:23:06 +05:30 committed by Patrick Georgi
parent 406313d46d
commit a73408d608
2 changed files with 17 additions and 0 deletions
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5
src/drivers/uart/Kconfig
View File

@ -17,6 +17,11 @@ config DRIVERS_UART_8250MEM
bool bool
default n default n
config DRIVERS_UART_8250MEM_32
bool
default n
depends on DRIVERS_UART_8250MEM
config HAVE_UART_SPECIAL config HAVE_UART_SPECIAL
bool bool
default n default n

12
src/drivers/uart/uart8250mem.c
View File

@ -34,6 +34,17 @@
#define SINGLE_CHAR_TIMEOUT (50 * 1000) #define SINGLE_CHAR_TIMEOUT (50 * 1000)
#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) #define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT)
#if IS_ENABLED(CONFIG_DRIVERS_UART_8250MEM_32)
static uint8_t uart8250_read(void *base, uint8_t reg)
{
return read32(base + 4 * reg) & 0xff;
}
static void uart8250_write(void *base, uint8_t reg, uint8_t data)
{
write32(base + 4 * reg, data);
}
#else
static uint8_t uart8250_read(void *base, uint8_t reg) static uint8_t uart8250_read(void *base, uint8_t reg)
{ {
return read8(base + reg); return read8(base + reg);
@ -43,6 +54,7 @@ static void uart8250_write(void *base, uint8_t reg, uint8_t data)
{ {
write8(base + reg, data); write8(base + reg, data);
} }
#endif
static int uart8250_mem_can_tx_byte(void *base) static int uart8250_mem_can_tx_byte(void *base)
{ {