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cpu/intel/car: Drop remains of setup_stack_and_mtrrs() 

Platforms have moved to POSTCAR_STAGE=y.

Change-Id: I79c87e546805dbe0a4c28ed95f4d12666734eb79
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30489
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2018-12-28 17:45:13 +02:00
parent 05a7ffa25b
commit a75ab2c46d
4 changed files with 0 additions and 28 deletions
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3
src/cpu/intel/car/romstage.c
View File

@ -50,9 +50,6 @@ asmlinkage void *romstage_main(unsigned long bist)
printk(BIOS_DEBUG, "Smashed stack detected in romstage!\n");
}
if (!IS_ENABLED(CONFIG_POSTCAR_STAGE))
return setup_stack_and_mtrrs();
platform_enter_postcar();
/* We do not return. */

17
src/include/cpu/intel/romstage.h
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@ -5,23 +5,6 @@
void mainboard_romstage_entry(unsigned long bist);
/* romstage_main is called from the cache-as-ram assembly file. The return
* value is the stack value to be used for romstage once cache-as-ram is
* torn down. The following values are pushed onto the stack to setup the
* MTRRs:
* +0: Number of MTRRs
* +4: MTRR base 0 31:0
* +8: MTRR base 0 63:32
* +12: MTRR mask 0 31:0
* +16: MTRR mask 0 63:32
* +20: MTRR base 1 31:0
* +24: MTRR base 1 63:32
* +28: MTRR mask 1 31:0
* +32: MTRR mask 1 63:32
* ...
*/
void *setup_stack_and_mtrrs(void);
void platform_enter_postcar(void);
/* romstage_main is called from the cache-as-ram assembly file to prepare

7
src/soc/intel/baytrail/romstage/romstage.c
View File

@ -230,13 +230,6 @@ void romstage_common(struct romstage_params *params)
romstage_handoff_init(prev_sleep_state == ACPI_S3);
}
static inline uint32_t *stack_push(u32 *stack, u32 value)
{
stack = &stack[-1];
*stack = value;
return stack;
}
#define ROMSTAGE_RAM_STACK_SIZE 0x5000
/* setup_stack_and_mtrrs() determines the stack to use after

1
src/soc/intel/broadwell/include/soc/romstage.h
View File

@ -32,7 +32,6 @@ void romstage_common(struct romstage_params *params);
asmlinkage void *romstage_main(unsigned long bist, uint32_t tsc_lo,
uint32_t tsc_high);
void raminit(struct pei_data *pei_data);
void *setup_stack_and_mtrrs(void);
struct chipset_power_state;
struct chipset_power_state *fill_power_state(void);