soc/amd/cezanne: Add uart controllers to chipset.cb

Add uart controller to chipset.cb and leave it off by default.
Turn uart0 on for console for mainboards.

BUG=none
TEST=builds and boot into OS

Signed-off-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Change-Id: Iaeb7fea4b92bd89331c7ae7c1c000f8d9961fe9e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52287
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>

src/mainboard/amd/majolica/devicetree.cb

@@ -75,4 +75,6 @@ chip soc/amd/cezanne
 		end
 	end
 
+	device ref uart_0 on end # UART0
+
 end

src/mainboard/google/guybrush/variants/baseboard/devicetree.cb

@@ -142,4 +142,7 @@ chip soc/amd/cezanne
 			device i2c 50 on end
 		end
 	end
+
+	device ref uart_0 on end # UART0
+
 end	# chip soc/amd/cezanne

src/mainboard/google/mancomb/variants/baseboard/devicetree.cb

@@ -130,4 +130,7 @@ chip soc/amd/cezanne
 			end
 		end
 	end # domain
+
+	device ref uart_0 on end # UART0
+
 end	# chip soc/amd/cezanne

src/soc/amd/cezanne/chipset.cb

@@ -107,4 +107,6 @@ chip soc/amd/cezanne
 	device mmio 0xfedc3000 alias i2c_1 off end
 	device mmio 0xfedc4000 alias i2c_2 off end
 	device mmio 0xfedc5000 alias i2c_3 off end
+	device mmio 0xfedc9000 alias uart_0 off end
+	device mmio 0xfedca000 alias uart_1 off end
 end