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soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG 

This macro is not correct because the RX Level/Edge Configuration
(trig) and the GPIO Tx/Rx Buffer Disable (bufdis) fields in DW0
register do not affect on the pad in the native function mode.

This is part of the patch set
"src/mb/*, src/soc/intel/common/gpio: Remove PAD_CFG_NF_BUF_TRIG ":

CB:43455 - cedarisland: undo set trig and bufdis for NF pads
CB:43454 - tiogapass: undo set trig and bufdis for NF pads
CB:43561 - h110m: undo set trig and bufdis for NF pads
CB:43569 - soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG

Change-Id: Ic0416e3f67016c648f0886df73f585e8a08d4e92
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao
Reviewed-by: Michael Niewöhner
This commit is contained in:
Maxim Polyakov 2020-07-18 13:38:32 +03:00 committed by Patrick Georgi
parent 6489a19c78
commit a76a64833b
2 changed files with 0 additions and 15 deletions
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5
Documentation/getting_started/gpio.md
View File

@ -88,11 +88,6 @@ configurations together into a set of macros, e.g.,
```C
/* Native function configuration */
#define PAD_CFG_NF(pad, pull, rst, func)
/*
* Set native function with RX Level/Edge configuration and disable
* input/output buffer if necessary
*/
#define PAD_CFG_NF_BUF_TRIG(pad, pull, rst, func, bufdis, trig)
/* General purpose output, no pullup/down. */
#define PAD_CFG_GPO(pad, val, rst)
/* General purpose output, with termination specified */

10
src/soc/intel/common/block/include/intelblocks/gpio_defs.h
View File

@ -185,16 +185,6 @@
PAD_RESET(rst) | PAD_FUNC(func), \
PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE))
/*
* Set native function with RX Level/Edge configuration and disable
* input/output buffer if necessary
*/
#define PAD_CFG_NF_BUF_TRIG(pad, pull, rst, func, bufdis, trig) \
_PAD_CFG_STRUCT(pad, \
PAD_RESET(rst) | PAD_TRIG(trig) | \
PAD_BUF(bufdis) | PAD_FUNC(func), \
PAD_PULL(pull) | PAD_IOSSTATE(TxLASTRxE))
#if CONFIG(SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL)
/* Native 1.8V tolerant pad, only applies to some pads like I2C/I2S
Not applicable to all SOCs. Refer EDS