intel/i945 boards: Add EARLY_CBMEM_INIT
Inspired by commitsac6ea04b
and4560ca50
that enabled this feature for lenovo/x60 and lenovo/t60 with i945 chipset. Change-Id: Ia04f58b8c3769b5734708c6a338bb80c13c5aeba Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3994 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
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66fd775168
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a7c9611712
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@ -30,6 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select SUPERIO_SMSC_FDC37N972
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select SUPERIO_SMSC_SIO10N268
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select EC_ACPI
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select EARLY_CBMEM_INIT
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select HAVE_ACPI_TABLES
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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@ -26,6 +26,7 @@
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#include <device/pnp_def.h>
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#include <cpu/x86/lapic.h>
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#include <lib.h>
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#include <cbmem.h>
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#include <pc80/mc146818rtc.h>
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#include <console/console.h>
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#include <cpu/x86/bist.h>
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@ -263,12 +264,11 @@ static void early_ich7_init(void)
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RCBA32(0x2034) = reg32;
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}
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#include <cbmem.h>
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void main(unsigned long bist)
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{
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u32 reg32;
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int boot_mode = 0;
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int cbmem_was_initted;
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if (bist == 0)
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enable_lapic();
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@ -357,11 +357,13 @@ void main(unsigned long bist)
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#endif
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MCHBAR16(SSKPD) = 0xCAFE;
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cbmem_was_initted = !cbmem_initialize();
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#if CONFIG_HAVE_ACPI_RESUME
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/* If there is no high memory area, we didn't boot before, so
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* this is not a resume. In that case we just create the cbmem toc.
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*/
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if ((boot_mode == 2) && cbmem_reinit()) {
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if ((boot_mode == 2) && cbmem_was_initted) {
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void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
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/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
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@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select CHECK_SLFRCS_ON_RESUME
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select SOUTHBRIDGE_INTEL_I82801GX
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select SUPERIO_WINBOND_W83627EHG
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select EARLY_CBMEM_INIT
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select HAVE_ACPI_TABLES
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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@ -26,6 +26,7 @@
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#include <device/pnp_def.h>
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#include <cpu/x86/lapic.h>
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#include <lib.h>
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#include <cbmem.h>
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#include "superio/winbond/w83627ehg/w83627ehg.h"
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#include <pc80/mc146818rtc.h>
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#include <console/console.h>
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@ -221,12 +222,11 @@ static void early_ich7_init(void)
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RCBA32(0x2034) = reg32;
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}
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#include <cbmem.h>
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void main(unsigned long bist)
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{
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u32 reg32;
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int boot_mode = 0;
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int cbmem_was_initted;
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if (bist == 0)
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enable_lapic();
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@ -311,11 +311,13 @@ void main(unsigned long bist)
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MCHBAR16(SSKPD) = 0xCAFE;
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cbmem_was_initted = !cbmem_initialize();
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#if CONFIG_HAVE_ACPI_RESUME
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/* If there is no high memory area, we didn't boot before, so
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* this is not a resume. In that case we just create the cbmem toc.
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*/
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if ((boot_mode == 2) && cbmem_reinit()) {
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if ((boot_mode == 2) && cbmem_was_initted) {
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void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
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/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
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@ -30,6 +30,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select EARLY_CBMEM_INIT
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_RESUME
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select BOARD_ROMSIZE_KB_512
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@ -26,6 +26,7 @@
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#include <device/pnp_def.h>
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#include <cpu/x86/lapic.h>
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#include <lib.h>
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#include <cbmem.h>
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#include "superio/smsc/lpc47m15x/lpc47m15x.h"
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#include <pc80/mc146818rtc.h>
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#include <console/console.h>
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@ -182,12 +183,11 @@ static void early_ich7_init(void)
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RCBA32(0x2034) = reg32;
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}
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#include <cbmem.h>
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void main(unsigned long bist)
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{
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u32 reg32;
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int boot_mode = 0;
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int cbmem_was_initted;
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if (bist == 0)
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enable_lapic();
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@ -269,11 +269,13 @@ void main(unsigned long bist)
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MCHBAR16(SSKPD) = 0xCAFE;
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cbmem_was_initted = !cbmem_initialize();
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#if CONFIG_HAVE_ACPI_RESUME
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/* If there is no high memory area, we didn't boot before, so
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* this is not a resume. In that case we just create the cbmem toc.
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*/
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if ((boot_mode == 2) && cbmem_reinit()) {
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if ((boot_mode == 2) && cbmem_was_initted) {
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void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
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/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
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@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select CHECK_SLFRCS_ON_RESUME
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select SOUTHBRIDGE_INTEL_I82801GX
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select SUPERIO_WINBOND_W83627THG
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select EARLY_CBMEM_INIT
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select HAVE_ACPI_TABLES
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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@ -22,6 +22,7 @@
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#include <stdint.h>
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#include <string.h>
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#include <lib.h>
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#include <cbmem.h>
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#include <arch/io.h>
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#include <device/pci_def.h>
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#include <device/pnp_def.h>
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@ -314,12 +315,11 @@ static void early_ich7_init(void)
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RCBA32(0x2034) = reg32;
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}
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#include <cbmem.h>
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void main(unsigned long bist)
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{
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u32 reg32;
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int boot_mode = 0;
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int cbmem_was_initted;
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if (bist == 0)
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enable_lapic();
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@ -410,11 +410,13 @@ void main(unsigned long bist)
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MCHBAR16(SSKPD) = 0xCAFE;
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cbmem_was_initted = !cbmem_initialize();
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#if CONFIG_HAVE_ACPI_RESUME
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/* If there is no high memory area, we didn't boot before, so
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* this is not a resume. In that case we just create the cbmem toc.
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*/
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if ((boot_mode == 2) && cbmem_reinit()) {
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if ((boot_mode == 2) && cbmem_was_initted) {
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void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
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/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
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@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select EARLY_CBMEM_INIT
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select HAVE_ACPI_TABLES
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select HAVE_ACPI_RESUME
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select BOARD_ROMSIZE_KB_1024
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@ -28,6 +28,7 @@
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#include <device/pnp_def.h>
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#include <cpu/x86/lapic.h>
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#include <lib.h>
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#include <cbmem.h>
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#include <pc80/mc146818rtc.h>
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#include <console/console.h>
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#include <cpu/x86/bist.h>
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@ -249,12 +250,11 @@ static void init_artec_dongle(void)
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outb(0xf4, 0x88);
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}
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#include <cbmem.h>
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void main(unsigned long bist)
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{
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u32 reg32;
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int boot_mode = 0;
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int cbmem_was_initted;
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if (bist == 0)
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enable_lapic();
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@ -346,11 +346,13 @@ void main(unsigned long bist)
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MCHBAR16(SSKPD) = 0xCAFE;
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cbmem_was_initted = !cbmem_initialize();
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#if CONFIG_HAVE_ACPI_RESUME
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/* If there is no high memory area, we didn't boot before, so
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* this is not a resume. In that case we just create the cbmem toc.
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*/
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if ((boot_mode == 2) && cbmem_reinit()) {
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if ((boot_mode == 2) && cbmem_was_initted) {
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void *resume_backup_memory = cbmem_find(CBMEM_ID_RESUME);
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/* copy 1MB - 64K to high tables ram_base to prevent memory corruption
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