From a7f55af995040045875515857d095c021984f7f2 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Sat, 9 Sep 2023 10:18:03 +0200 Subject: [PATCH] sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate Change-Id: I867451ae3d6d37033c9e0e57a4d7fd4a06dedbef Signed-off-by: Elyes Haouas Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/77738 Reviewed-by: Felix Singer Tested-by: build bot (Jenkins) Reviewed-by: Nicholas Chin --- src/southbridge/intel/i82801ix/chip.h | 10 +++++----- src/southbridge/intel/i82801ix/lpc.c | 4 ++-- src/southbridge/intel/i82801jx/chip.h | 8 ++++---- src/southbridge/intel/i82801jx/lpc.c | 4 ++-- 4 files changed, 13 insertions(+), 13 deletions(-) diff --git a/src/southbridge/intel/i82801ix/chip.h b/src/southbridge/intel/i82801ix/chip.h index d52a0c2006..33f9713368 100644 --- a/src/southbridge/intel/i82801ix/chip.h +++ b/src/southbridge/intel/i82801ix/chip.h @@ -56,12 +56,12 @@ struct southbridge_intel_i82801ix_config { /* IDE configuration */ uint8_t sata_port_map : 6; - unsigned int sata_clock_request : 1; - unsigned int sata_traffic_monitor : 1; + bool sata_clock_request; + bool sata_traffic_monitor; - unsigned int c4onc3_enable:1; - unsigned int c5_enable : 1; - unsigned int c6_enable : 1; + bool c4onc3_enable; + bool c5_enable; + bool c6_enable; unsigned int throttle_duty : 3; diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index d897130e42..91b7456d54 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -142,14 +142,14 @@ bool southbridge_support_c5(void) { struct device *lpc_dev = __pci_0_1f_0; struct southbridge_intel_i82801ix_config *config = lpc_dev->chip_info; - return config->c5_enable == 1; + return config->c5_enable; } bool southbridge_support_c6(void) { struct device *lpc_dev = __pci_0_1f_0; struct southbridge_intel_i82801ix_config *config = lpc_dev->chip_info; - return config->c6_enable == 1; + return config->c6_enable; } static void i82801ix_power_options(struct device *dev) diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h index f12a67e877..48ad2124d0 100644 --- a/src/southbridge/intel/i82801jx/chip.h +++ b/src/southbridge/intel/i82801jx/chip.h @@ -43,11 +43,11 @@ struct southbridge_intel_i82801jx_config { /* IDE configuration */ uint8_t sata_port_map : 6; - unsigned int sata_clock_request : 1; + bool sata_clock_request; - unsigned int c4onc3_enable:1; - unsigned int c5_enable : 1; - unsigned int c6_enable : 1; + bool c4onc3_enable; + bool c5_enable; + bool c6_enable; unsigned int throttle_duty : 3; diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index e93502fa0d..7cff33a261 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -144,14 +144,14 @@ bool southbridge_support_c5(void) { struct device *lpc_dev = __pci_0_1f_0; struct southbridge_intel_i82801jx_config *config = lpc_dev->chip_info; - return config->c5_enable == 1; + return config->c5_enable; } bool southbridge_support_c6(void) { struct device *lpc_dev = __pci_0_1f_0; struct southbridge_intel_i82801jx_config *config = lpc_dev->chip_info; - return config->c6_enable == 1; + return config->c6_enable; } static void i82801jx_power_options(struct device *dev)