soc/mediatek/mt8188: Allow CPUfreq hardware to access MCUPM registers

This patch fixes AP hanging issue caused by the handshaking between
MCUPM and CPUfreq driver.

CPUfreq hardware failed to read MCUPM registers due to DEVAPC
permission. Therefore, update the DEVAPC settings to fix this issue.

BUG=none
TEST=CPUfreq in kernel test pass.

Change-Id: I6b30b01fc0be052182599709cbcc9139e6d09742
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67724
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/mediatek/mt8188/devapc.c

@@ -1550,6 +1550,12 @@ static void dump_peri_par_ao_apc(uintptr_t base)
 
 static void infra_init(uintptr_t base)
 {
+	/* Side band */
+	SET32_BITFIELDS(getreg(base, MAS_SEC_0), MCUPM_SEC, SECURE_TRANS);
+
+	/* Master domain */
+	SET32_BITFIELDS(getreg(base, MAS_DOM_0), SCP_SSPM_DOM, DOMAIN_2, MCUPM_DOM, DOMAIN_2);
+
 	/* Default APC setting */
 	set_infra_ao_apc(base);
 }

src/soc/mediatek/mt8188/include/soc/devapc.h

@@ -17,6 +17,10 @@ enum devapc_ao_offset {
 	AO_APC_CON = 0x00F00,
 };
 
+DEFINE_BIT(MCUPM_SEC, 1)
+DEFINE_BITFIELD(MCUPM_DOM, 11, 8)
+DEFINE_BITFIELD(SCP_SSPM_DOM, 19, 16)
+
 /******************************************************************************
  * STRUCTURE DEFINITION
  ******************************************************************************/