drivers/spi: remove SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option

The SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B option is no longer
being used in the code. There's a runtime check for supporting
fast read dual output mode of the spi flash. Remove the references
to SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B.

Change-Id: Ie7d9d3f91f29a700f07ab33feaf427a872bbf7df
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38166
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Aaron Durbin 2020-01-03 15:31:01 -07:00
parent a48e8f52d8
commit a8280e4cc0
4 changed files with 0 additions and 12 deletions

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@ -149,15 +149,6 @@ config SPI_FLASH_WINBOND
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Winbond.
config SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B
bool
default n
depends on SPI_FLASH
help
Select this option if your SPI flash supports the fast read dual-
output command (opcode 0x3b) where the opcode and address are sent
to the chip on MOSI and data is received on both MOSI and MISO.
config SPI_FLASH_HAS_VOLATILE_GROUP
bool
default n

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@ -27,7 +27,6 @@ config BOARD_SPECIFIC_OPTIONS
select SPI_FLASH
select SPI_FLASH_GIGADEVICE
select SPI_FLASH_WINBOND
select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B
config VBOOT
select EC_GOOGLE_CHROMEEC_SWITCHES

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@ -27,7 +27,6 @@ config BOARD_SPECIFIC_OPTIONS
select SPI_FLASH
select SPI_FLASH_GIGADEVICE
select SPI_FLASH_WINBOND
select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B
select MAINBOARD_HAS_I2C_TPM_GENERIC
select MAINBOARD_HAS_TPM1

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@ -27,7 +27,6 @@ config BOARD_SPECIFIC_OPTIONS
select SPI_FLASH
select SPI_FLASH_GIGADEVICE
select SPI_FLASH_WINBOND
select SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B
select MAINBOARD_HAS_I2C_TPM_GENERIC
select MAINBOARD_HAS_TPM1