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Kconfig: separate memory mapped boot device from SPI 

Make the indication of the boot device being memory mapped
separate from SPI. However, retain the same defaults that
previously existed.

BUG=chrome-os-partner:56151

Change-Id: Ibdd7c8754f9bf560a878136b1f55238e2c2549d3
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16193
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Aaron Durbin 2016-08-11 14:04:10 -05:00
parent 3cef11753d
commit a83bbf5854
5 changed files with 12 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
src/Kconfig
View File

@ -480,6 +480,13 @@ endmenu
source "src/acpi/Kconfig"
config BOOT_DEVICE_MEMORY_MAPPED
bool
default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH
default n
help
Inform system if SPI is memory-mapped or not.
config RTC
bool
default n

4
src/drivers/elog/elog.c
View File

@ -586,8 +586,8 @@ static int elog_shrink(void)
*/
static inline u8 *elog_flash_offset_to_address(void)
{
/* Only support memory-mapped SPI devices. */
if (!IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED))
/* Only support memory-mapped devices. */
if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
return NULL;
if (!elog_spi)

7
src/drivers/spi/Kconfig
View File

@ -32,13 +32,6 @@ config SPI_ATOMIC_SEQUENCING
in the SPI controller. Hardware manages the transaction instead of
software. This is common on x86 platforms.
config SPI_FLASH_MEMORY_MAPPED
bool
default y if ARCH_X86
default n if !ARCH_X86
help
Inform system if SPI is memory-mapped or not.
config SPI_FLASH_SMM
bool "SPI flash driver support in SMM"
default n

2
src/lib/cbfs.c
View File

@ -193,7 +193,7 @@ int cbfs_prog_stage_load(struct prog *pstage)
/* Hacky way to not load programs over read only media. The stages
* that would hit this path initialize themselves. */
if (ENV_VERSTAGE && !IS_ENABLED(CONFIG_NO_XIP_EARLY_STAGES) &&
IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED)) {
IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)) {
void *mapping = rdev_mmap(fh, foffset, fsize);
rdev_munmap(fh, mapping);
if (mapping == load)

3
src/soc/intel/apollolake/romstage.c
View File

@ -160,7 +160,8 @@ void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd)
* state machine transition to next boot state, so that it can function
* as designed.
*/
mupd->FspmConfig.SkipCseRbp = IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED);
mupd->FspmConfig.SkipCseRbp =
IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED);
}
__attribute__ ((weak))